diff options
Diffstat (limited to 'drivers/iio')
38 files changed, 3883 insertions, 124 deletions
diff --git a/drivers/iio/accel/Kconfig b/drivers/iio/accel/Kconfig index 62ae7e5abcfa..829dc96c9dd6 100644 --- a/drivers/iio/accel/Kconfig +++ b/drivers/iio/accel/Kconfig @@ -40,7 +40,7 @@ config ADXL345_I2C select REGMAP_I2C help Say Y here if you want to build support for the Analog Devices - ADXL345 3-axis digital accelerometer. + ADXL345 or ADXL375 3-axis digital accelerometer. To compile this driver as a module, choose M here: the module will be called adxl345_i2c and you will also get adxl345_core @@ -54,7 +54,7 @@ config ADXL345_SPI select REGMAP_SPI help Say Y here if you want to build support for the Analog Devices - ADXL345 3-axis digital accelerometer. + ADXL345 or ADXL375 3-axis digital accelerometer. To compile this driver as a module, choose M here: the module will be called adxl345_spi and you will also get adxl345_core diff --git a/drivers/iio/accel/adxl345.h b/drivers/iio/accel/adxl345.h index c1ddf3927c47..ccd63de7a55a 100644 --- a/drivers/iio/accel/adxl345.h +++ b/drivers/iio/accel/adxl345.h @@ -11,8 +11,13 @@ #ifndef _ADXL345_H_ #define _ADXL345_H_ +enum adxl345_device_type { + ADXL345, + ADXL375, +}; + int adxl345_core_probe(struct device *dev, struct regmap *regmap, - const char *name); + enum adxl345_device_type type, const char *name); int adxl345_core_remove(struct device *dev); #endif /* _ADXL345_H_ */ diff --git a/drivers/iio/accel/adxl345_core.c b/drivers/iio/accel/adxl345_core.c index 7251d0e63d74..780f87f72338 100644 --- a/drivers/iio/accel/adxl345_core.c +++ b/drivers/iio/accel/adxl345_core.c @@ -6,21 +6,35 @@ * This file is subject to the terms and conditions of version 2 of * the GNU General Public License. See the file COPYING in the main * directory of this archive for more details. + * + * Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/ADXL345.pdf */ #include <linux/module.h> #include <linux/regmap.h> #include <linux/iio/iio.h> +#include <linux/iio/sysfs.h> #include "adxl345.h" #define ADXL345_REG_DEVID 0x00 +#define ADXL345_REG_OFSX 0x1e +#define ADXL345_REG_OFSY 0x1f +#define ADXL345_REG_OFSZ 0x20 +#define ADXL345_REG_OFS_AXIS(index) (ADXL345_REG_OFSX + (index)) +#define ADXL345_REG_BW_RATE 0x2C #define ADXL345_REG_POWER_CTL 0x2D #define ADXL345_REG_DATA_FORMAT 0x31 #define ADXL345_REG_DATAX0 0x32 #define ADXL345_REG_DATAY0 0x34 #define ADXL345_REG_DATAZ0 0x36 +#define ADXL345_REG_DATA_AXIS(index) \ + (ADXL345_REG_DATAX0 + (index) * sizeof(__le16)) + +#define ADXL345_BW_RATE GENMASK(3, 0) +#define ADXL345_BASE_RATE_NANO_HZ 97656250LL +#define NHZ_PER_HZ 1000000000LL #define ADXL345_POWER_CTL_MEASURE BIT(3) #define ADXL345_POWER_CTL_STANDBY 0x00 @@ -42,24 +56,33 @@ */ static const int adxl345_uscale = 38300; +/* + * The Datasheet lists a resolution of Resolution is ~49 mg per LSB. That's + * ~480mm/s**2 per LSB. + */ +static const int adxl375_uscale = 480000; + struct adxl345_data { struct regmap *regmap; u8 data_range; + enum adxl345_device_type type; }; -#define ADXL345_CHANNEL(reg, axis) { \ +#define ADXL345_CHANNEL(index, axis) { \ .type = IIO_ACCEL, \ .modified = 1, \ .channel2 = IIO_MOD_##axis, \ - .address = reg, \ - .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \ - .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE), \ + .address = index, \ + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | \ + BIT(IIO_CHAN_INFO_CALIBBIAS), \ + .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE) | \ + BIT(IIO_CHAN_INFO_SAMP_FREQ), \ } static const struct iio_chan_spec adxl345_channels[] = { - ADXL345_CHANNEL(ADXL345_REG_DATAX0, X), - ADXL345_CHANNEL(ADXL345_REG_DATAY0, Y), - ADXL345_CHANNEL(ADXL345_REG_DATAZ0, Z), + ADXL345_CHANNEL(0, X), + ADXL345_CHANNEL(1, Y), + ADXL345_CHANNEL(2, Z), }; static int adxl345_read_raw(struct iio_dev *indio_dev, @@ -67,7 +90,9 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, int *val, int *val2, long mask) { struct adxl345_data *data = iio_priv(indio_dev); - __le16 regval; + __le16 accel; + long long samp_freq_nhz; + unsigned int regval; int ret; switch (mask) { @@ -77,29 +102,117 @@ static int adxl345_read_raw(struct iio_dev *indio_dev, * ADXL345_REG_DATA(X0/Y0/Z0) contain the least significant byte * and ADXL345_REG_DATA(X0/Y0/Z0) + 1 the most significant byte */ - ret = regmap_bulk_read(data->regmap, chan->address, ®val, - sizeof(regval)); + ret = regmap_bulk_read(data->regmap, + ADXL345_REG_DATA_AXIS(chan->address), + &accel, sizeof(accel)); if (ret < 0) return ret; - *val = sign_extend32(le16_to_cpu(regval), 12); + *val = sign_extend32(le16_to_cpu(accel), 12); return IIO_VAL_INT; case IIO_CHAN_INFO_SCALE: *val = 0; - *val2 = adxl345_uscale; + switch (data->type) { + case ADXL345: + *val2 = adxl345_uscale; + break; + case ADXL375: + *val2 = adxl375_uscale; + break; + } return IIO_VAL_INT_PLUS_MICRO; + case IIO_CHAN_INFO_CALIBBIAS: + ret = regmap_read(data->regmap, + ADXL345_REG_OFS_AXIS(chan->address), ®val); + if (ret < 0) + return ret; + /* + * 8-bit resolution at +/- 2g, that is 4x accel data scale + * factor + */ + *val = sign_extend32(regval, 7) * 4; + + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + ret = regmap_read(data->regmap, ADXL345_REG_BW_RATE, ®val); + if (ret < 0) + return ret; + + samp_freq_nhz = ADXL345_BASE_RATE_NANO_HZ << + (regval & ADXL345_BW_RATE); + *val = div_s64_rem(samp_freq_nhz, NHZ_PER_HZ, val2); + + return IIO_VAL_INT_PLUS_NANO; } return -EINVAL; } +static int adxl345_write_raw(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + int val, int val2, long mask) +{ + struct adxl345_data *data = iio_priv(indio_dev); + s64 n; + + switch (mask) { + case IIO_CHAN_INFO_CALIBBIAS: + /* + * 8-bit resolution at +/- 2g, that is 4x accel data scale + * factor + */ + return regmap_write(data->regmap, + ADXL345_REG_OFS_AXIS(chan->address), + val / 4); + case IIO_CHAN_INFO_SAMP_FREQ: + n = div_s64(val * NHZ_PER_HZ + val2, ADXL345_BASE_RATE_NANO_HZ); + + return regmap_update_bits(data->regmap, ADXL345_REG_BW_RATE, + ADXL345_BW_RATE, + clamp_val(ilog2(n), 0, + ADXL345_BW_RATE)); + } + + return -EINVAL; +} + +static int adxl345_write_raw_get_fmt(struct iio_dev *indio_dev, + struct iio_chan_spec const *chan, + long mask) +{ + switch (mask) { + case IIO_CHAN_INFO_CALIBBIAS: + return IIO_VAL_INT; + case IIO_CHAN_INFO_SAMP_FREQ: + return IIO_VAL_INT_PLUS_NANO; + default: + return -EINVAL; + } +} + +static IIO_CONST_ATTR_SAMP_FREQ_AVAIL( +"0.09765625 0.1953125 0.390625 0.78125 1.5625 3.125 6.25 12.5 25 50 100 200 400 800 1600 3200" +); + +static struct attribute *adxl345_attrs[] = { + &iio_const_attr_sampling_frequency_available.dev_attr.attr, + NULL, +}; + +static const struct attribute_group adxl345_attrs_group = { + .attrs = adxl345_attrs, +}; + static const struct iio_info adxl345_info = { + .attrs = &adxl345_attrs_group, .read_raw = adxl345_read_raw, + .write_raw = adxl345_write_raw, + .write_raw_get_fmt = adxl345_write_raw_get_fmt, }; int adxl345_core_probe(struct device *dev, struct regmap *regmap, - const char *name) + enum adxl345_device_type type, const char *name) { struct adxl345_data *data; struct iio_dev *indio_dev; @@ -125,6 +238,7 @@ int adxl345_core_probe(struct device *dev, struct regmap *regmap, data = iio_priv(indio_dev); dev_set_drvdata(dev, indio_dev); data->regmap = regmap; + data->type = type; /* Enable full-resolution mode */ data->data_range = ADXL345_DATA_FORMAT_FULL_RES; diff --git a/drivers/iio/accel/adxl345_i2c.c b/drivers/iio/accel/adxl345_i2c.c index 05e1ec49700c..785c89de91e7 100644 --- a/drivers/iio/accel/adxl345_i2c.c +++ b/drivers/iio/accel/adxl345_i2c.c @@ -34,7 +34,8 @@ static int adxl345_i2c_probe(struct i2c_client *client, return PTR_ERR(regmap); } - return adxl345_core_probe(&client->dev, regmap, id ? id->name : NULL); + return adxl345_core_probe(&client->dev, regmap, id->driver_data, + id ? id->name : NULL); } static int adxl345_i2c_remove(struct i2c_client *client) @@ -43,7 +44,8 @@ static int adxl345_i2c_remove(struct i2c_client *client) } static const struct i2c_device_id adxl345_i2c_id[] = { - { "adxl345", 0 }, + { "adxl345", ADXL345 }, + { "adxl375", ADXL375 }, { } }; @@ -51,6 +53,7 @@ MODULE_DEVICE_TABLE(i2c, adxl345_i2c_id); static const struct of_device_id adxl345_of_match[] = { { .compatible = "adi,adxl345" }, + { .compatible = "adi,adxl375" }, { }, }; diff --git a/drivers/iio/accel/adxl345_spi.c b/drivers/iio/accel/adxl345_spi.c index 6d658196f81c..67b7c66a8492 100644 --- a/drivers/iio/accel/adxl345_spi.c +++ b/drivers/iio/accel/adxl345_spi.c @@ -42,7 +42,7 @@ static int adxl345_spi_probe(struct spi_device *spi) return PTR_ERR(regmap); } - return adxl345_core_probe(&spi->dev, regmap, id->name); + return adxl345_core_probe(&spi->dev, regmap, id->driver_data, id->name); } static int adxl345_spi_remove(struct spi_device *spi) @@ -51,7 +51,8 @@ static int adxl345_spi_remove(struct spi_device *spi) } static const struct spi_device_id adxl345_spi_id[] = { - { "adxl345", 0 }, + { "adxl345", ADXL345 }, + { "adxl375", ADXL375 }, { } }; @@ -59,6 +60,7 @@ MODULE_DEVICE_TABLE(spi, adxl345_spi_id); static const struct of_device_id adxl345_of_match[] = { { .compatible = "adi,adxl345" }, + { .compatible = "adi,adxl375" }, { }, }; diff --git a/drivers/iio/accel/mma8452.c b/drivers/iio/accel/mma8452.c index c149c9c360fc..421a0a8a1379 100644 --- a/drivers/iio/accel/mma8452.c +++ b/drivers/iio/accel/mma8452.c @@ -1547,6 +1547,7 @@ static int mma8452_probe(struct i2c_client *client, case FXLS8471_DEVICE_ID: if (ret == data->chip_info->chip_id) break; + /* else: fall through */ default: return -ENODEV; } diff --git a/drivers/iio/accel/sca3000.c b/drivers/iio/accel/sca3000.c index 4dceb75e3586..4964561595f5 100644 --- a/drivers/iio/accel/sca3000.c +++ b/drivers/iio/accel/sca3000.c @@ -797,6 +797,7 @@ static int sca3000_write_raw(struct iio_dev *indio_dev, mutex_lock(&st->lock); ret = sca3000_write_3db_freq(st, val); mutex_unlock(&st->lock); + return ret; default: return -EINVAL; } diff --git a/drivers/iio/accel/st_accel_i2c.c b/drivers/iio/accel/st_accel_i2c.c index 056dddb27236..2ca5d1f6ade0 100644 --- a/drivers/iio/accel/st_accel_i2c.c +++ b/drivers/iio/accel/st_accel_i2c.c @@ -14,8 +14,8 @@ #include <linux/acpi.h> #include <linux/i2c.h> #include <linux/iio/iio.h> +#include <linux/property.h> -#include <linux/iio/common/st_sensors.h> #include <linux/iio/common/st_sensors_i2c.h> #include "st_accel.h" @@ -107,8 +107,8 @@ MODULE_DEVICE_TABLE(of, st_accel_of_match); #ifdef CONFIG_ACPI static const struct acpi_device_id st_accel_acpi_match[] = { - {"SMO8840", LNG2DM}, - {"SMO8A90", LNG2DM}, + {"SMO8840", (kernel_ulong_t)LNG2DM_ACCEL_DEV_NAME}, + {"SMO8A90", (kernel_ulong_t)LNG2DM_ACCEL_DEV_NAME}, { }, }; MODULE_DEVICE_TABLE(acpi, st_accel_acpi_match); @@ -117,33 +117,33 @@ MODULE_DEVICE_TABLE(acpi, st_accel_acpi_match); #endif static const struct i2c_device_id st_accel_id_table[] = { - { LSM303DLH_ACCEL_DEV_NAME, LSM303DLH }, - { LSM303DLHC_ACCEL_DEV_NAME, LSM303DLHC }, - { LIS3DH_ACCEL_DEV_NAME, LIS3DH }, - { LSM330D_ACCEL_DEV_NAME, LSM330D }, - { LSM330DL_ACCEL_DEV_NAME, LSM330DL }, - { LSM330DLC_ACCEL_DEV_NAME, LSM330DLC }, - { LIS331DLH_ACCEL_DEV_NAME, LIS331DLH }, - { LSM303DL_ACCEL_DEV_NAME, LSM303DL }, - { LSM303DLM_ACCEL_DEV_NAME, LSM303DLM }, - { LSM330_ACCEL_DEV_NAME, LSM330 }, - { LSM303AGR_ACCEL_DEV_NAME, LSM303AGR }, - { LIS2DH12_ACCEL_DEV_NAME, LIS2DH12 }, - { LIS3L02DQ_ACCEL_DEV_NAME, LIS3L02DQ }, - { LNG2DM_ACCEL_DEV_NAME, LNG2DM }, - { H3LIS331DL_ACCEL_DEV_NAME, H3LIS331DL }, - { LIS331DL_ACCEL_DEV_NAME, LIS331DL }, - { LIS3LV02DL_ACCEL_DEV_NAME, LIS3LV02DL }, - { LIS2DW12_ACCEL_DEV_NAME, LIS2DW12 }, + { LSM303DLH_ACCEL_DEV_NAME }, + { LSM303DLHC_ACCEL_DEV_NAME }, + { LIS3DH_ACCEL_DEV_NAME }, + { LSM330D_ACCEL_DEV_NAME }, + { LSM330DL_ACCEL_DEV_NAME }, + { LSM330DLC_ACCEL_DEV_NAME }, + { LIS331DLH_ACCEL_DEV_NAME }, + { LSM303DL_ACCEL_DEV_NAME }, + { LSM303DLM_ACCEL_DEV_NAME }, + { LSM330_ACCEL_DEV_NAME }, + { LSM303AGR_ACCEL_DEV_NAME }, + { LIS2DH12_ACCEL_DEV_NAME }, + { LIS3L02DQ_ACCEL_DEV_NAME }, + { LNG2DM_ACCEL_DEV_NAME }, + { H3LIS331DL_ACCEL_DEV_NAME }, + { LIS331DL_ACCEL_DEV_NAME }, + { LIS3LV02DL_ACCEL_DEV_NAME }, + { LIS2DW12_ACCEL_DEV_NAME }, {}, }; MODULE_DEVICE_TABLE(i2c, st_accel_id_table); -static int st_accel_i2c_probe(struct i2c_client *client, - const struct i2c_device_id *id) +static int st_accel_i2c_probe(struct i2c_client *client) { struct iio_dev *indio_dev; struct st_sensor_data *adata; + const char *match; int ret; indio_dev = devm_iio_device_alloc(&client->dev, sizeof(*adata)); @@ -152,19 +152,9 @@ static int st_accel_i2c_probe(struct i2c_client *client, adata = iio_priv(indio_dev); - if (client->dev.of_node) { - st_sensors_of_name_probe(&client->dev, st_accel_of_match, - client->name, sizeof(client->name)); - } else if (ACPI_HANDLE(&client->dev)) { - ret = st_sensors_match_acpi_device(&client->dev); - if ((ret < 0) || (ret >= ST_ACCEL_MAX)) - return -ENODEV; - - strlcpy(client->name, st_accel_id_table[ret].name, - sizeof(client->name)); - } else if (!id) - return -ENODEV; - + match = device_get_match_data(&client->dev); + if (match) + strlcpy(client->name, match, sizeof(client->name)); st_sensors_i2c_configure(indio_dev, client, adata); @@ -188,7 +178,7 @@ static struct i2c_driver st_accel_driver = { .of_match_table = of_match_ptr(st_accel_of_match), .acpi_match_table = ACPI_PTR(st_accel_acpi_match), }, - .probe = st_accel_i2c_probe, + .probe_new = st_accel_i2c_probe, .remove = st_accel_i2c_remove, .id_table = st_accel_id_table, }; diff --git a/drivers/iio/adc/Kconfig b/drivers/iio/adc/Kconfig index 084638e4ddf2..4a754921fb6f 100644 --- a/drivers/iio/adc/Kconfig +++ b/drivers/iio/adc/Kconfig @@ -620,6 +620,16 @@ config ROCKCHIP_SARADC To compile this driver as a module, choose M here: the module will be called rockchip_saradc. +config SC27XX_ADC + tristate "Spreadtrum SC27xx series PMICs ADC" + depends on MFD_SC27XX_PMIC || COMPILE_TEST + help + Say yes here to build support for the integrated ADC inside the + Spreadtrum SC27xx series PMICs. + + This driver can also be built as a module. If so, the module + will be called sc27xx_adc. + config SPEAR_ADC tristate "ST SPEAr ADC" depends on PLAT_SPEAR || COMPILE_TEST diff --git a/drivers/iio/adc/Makefile b/drivers/iio/adc/Makefile index 28a9423997f3..03db7b578f9c 100644 --- a/drivers/iio/adc/Makefile +++ b/drivers/iio/adc/Makefile @@ -59,6 +59,7 @@ obj-$(CONFIG_QCOM_SPMI_VADC) += qcom-spmi-vadc.o obj-$(CONFIG_QCOM_PM8XXX_XOADC) += qcom-pm8xxx-xoadc.o obj-$(CONFIG_RCAR_GYRO_ADC) += rcar-gyroadc.o obj-$(CONFIG_ROCKCHIP_SARADC) += rockchip_saradc.o +obj-$(CONFIG_SC27XX_ADC) += sc27xx_adc.o obj-$(CONFIG_SPEAR_ADC) += spear_adc.o obj-$(CONFIG_STX104) += stx104.o obj-$(CONFIG_SUN4I_GPADC) += sun4i-gpadc-iio.o diff --git a/drivers/iio/adc/at91-sama5d2_adc.c b/drivers/iio/adc/at91-sama5d2_adc.c index e02f7d1c86bc..d5ea84cf6460 100644 --- a/drivers/iio/adc/at91-sama5d2_adc.c +++ b/drivers/iio/adc/at91-sama5d2_adc.c @@ -1296,6 +1296,7 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev, { struct at91_adc_state *st = iio_priv(indio_dev); u32 cor = 0; + u16 tmp_val; int ret; /* @@ -1309,7 +1310,8 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev, mutex_lock(&st->lock); ret = at91_adc_read_position(st, chan->channel, - (u16 *)val); + &tmp_val); + *val = tmp_val; mutex_unlock(&st->lock); iio_device_release_direct_mode(indio_dev); @@ -1322,7 +1324,8 @@ static int at91_adc_read_info_raw(struct iio_dev *indio_dev, mutex_lock(&st->lock); ret = at91_adc_read_pressure(st, chan->channel, - (u16 *)val); + &tmp_val); + *val = tmp_val; mutex_unlock(&st->lock); iio_device_release_direct_mode(indio_dev); diff --git a/drivers/iio/adc/hx711.c b/drivers/iio/adc/hx711.c index 9430b54121e0..36b59d8957fb 100644 --- a/drivers/iio/adc/hx711.c +++ b/drivers/iio/adc/hx711.c @@ -97,6 +97,14 @@ struct hx711_data { * 2x32-bit channel + 64-bit timestamp */ u32 buffer[4]; + /* + * delay after a rising edge on SCK until the data is ready DOUT + * this is dependent on the hx711 where the datasheet tells a + * maximum value of 100 ns + * but also on potential parasitic capacities on the wiring + */ + u32 data_ready_delay_ns; + u32 clock_frequency; }; static int hx711_cycle(struct hx711_data *hx711_data) @@ -110,6 +118,14 @@ static int hx711_cycle(struct hx711_data *hx711_data) */ preempt_disable(); gpiod_set_value(hx711_data->gpiod_pd_sck, 1); + + /* + * wait until DOUT is ready + * it turned out that parasitic capacities are extending the time + * until DOUT has reached it's value + */ + ndelay(hx711_data->data_ready_delay_ns); + val = gpiod_get_value(hx711_data->gpiod_dout); /* * here we are not waiting for 0.2 us as suggested by the datasheet, @@ -120,6 +136,12 @@ static int hx711_cycle(struct hx711_data *hx711_data) gpiod_set_value(hx711_data->gpiod_pd_sck, 0); preempt_enable(); + /* + * make it a square wave for addressing cases with capacitance on + * PC_SCK + */ + ndelay(hx711_data->data_ready_delay_ns); + return val; } @@ -458,6 +480,7 @@ static const struct iio_chan_spec hx711_chan_spec[] = { static int hx711_probe(struct platform_device *pdev) { struct device *dev = &pdev->dev; + struct device_node *np = dev->of_node; struct hx711_data *hx711_data; struct iio_dev *indio_dev; int ret; @@ -530,6 +553,22 @@ static int hx711_probe(struct platform_device *pdev) hx711_data->gain_set = 128; hx711_data->gain_chan_a = 128; + hx711_data->clock_frequency = 400000; + ret = of_property_read_u32(np, "clock-frequency", + &hx711_data->clock_frequency); + + /* + * datasheet says the high level of PD_SCK has a maximum duration + * of 50 microseconds + */ + if (hx711_data->clock_frequency < 20000) { + dev_warn(dev, "clock-frequency too low - assuming 400 kHz\n"); + hx711_data->clock_frequency = 400000; + } + + hx711_data->data_ready_delay_ns = + 1000000000 / hx711_data->clock_frequency; + platform_set_drvdata(pdev, indio_dev); indio_dev->name = "hx711"; diff --git a/drivers/iio/adc/ina2xx-adc.c b/drivers/iio/adc/ina2xx-adc.c index 0635a79864bf..d1239624187d 100644 --- a/drivers/iio/adc/ina2xx-adc.c +++ b/drivers/iio/adc/ina2xx-adc.c @@ -30,6 +30,7 @@ #include <linux/module.h> #include <linux/of_device.h> #include <linux/regmap.h> +#include <linux/sched/task.h> #include <linux/util_macros.h> #include <linux/platform_data/ina2xx.h> @@ -826,6 +827,7 @@ static int ina2xx_buffer_enable(struct iio_dev *indio_dev) { struct ina2xx_chip_info *chip = iio_priv(indio_dev); unsigned int sampling_us = SAMPLING_PERIOD(chip); + struct task_struct *task; dev_dbg(&indio_dev->dev, "Enabling buffer w/ scan_mask %02x, freq = %d, avg =%u\n", (unsigned int)(*indio_dev->active_scan_mask), @@ -835,11 +837,17 @@ static int ina2xx_buffer_enable(struct iio_dev *indio_dev) dev_dbg(&indio_dev->dev, "Async readout mode: %d\n", chip->allow_async_readout); - chip->task = kthread_run(ina2xx_capture_thread, (void *)indio_dev, - "%s:%d-%uus", indio_dev->name, indio_dev->id, - sampling_us); + task = kthread_create(ina2xx_capture_thread, (void *)indio_dev, + "%s:%d-%uus", indio_dev->name, indio_dev->id, + sampling_us); + if (IS_ERR(task)) + return PTR_ERR(task); + + get_task_struct(task); + wake_up_process(task); + chip->task = task; - return PTR_ERR_OR_ZERO(chip->task); + return 0; } static int ina2xx_buffer_disable(struct iio_dev *indio_dev) @@ -848,6 +856,7 @@ static int ina2xx_buffer_disable(struct iio_dev *indio_dev) if (chip->task) { kthread_stop(chip->task); + put_task_struct(chip->task); chip->task = NULL; } diff --git a/drivers/iio/adc/max1363.c b/drivers/iio/adc/max1363.c index 7fb4f525714a..a8d35aebee80 100644 --- a/drivers/iio/adc/max1363.c +++ b/drivers/iio/adc/max1363.c @@ -1577,7 +1577,6 @@ static int max1363_probe(struct i2c_client *client, struct max1363_state *st; struct iio_dev *indio_dev; struct regulator *vref; - const struct of_device_id *match; indio_dev = devm_iio_device_alloc(&client->dev, sizeof(struct max1363_state)); @@ -1604,11 +1603,8 @@ static int max1363_probe(struct i2c_client *client, /* this is only used for device removal purposes */ i2c_set_clientdata(client, indio_dev); - match = of_match_device(of_match_ptr(max1363_of_match), - &client->dev); - if (match) - st->chip_info = of_device_get_match_data(&client->dev); - else + st->chip_info = of_device_get_match_data(&client->dev); + if (!st->chip_info) st->chip_info = &max1363_chip_info_tbl[id->driver_data]; st->client = client; diff --git a/drivers/iio/adc/meson_saradc.c b/drivers/iio/adc/meson_saradc.c index 2948909f3ee3..da2d16dfa63e 100644 --- a/drivers/iio/adc/meson_saradc.c +++ b/drivers/iio/adc/meson_saradc.c @@ -922,6 +922,11 @@ static const struct meson_sar_adc_data meson_sar_adc_meson8b_data = { .name = "meson-meson8b-saradc", }; +static const struct meson_sar_adc_data meson_sar_adc_meson8m2_data = { + .param = &meson_sar_adc_meson8_param, + .name = "meson-meson8m2-saradc", +}; + static const struct meson_sar_adc_data meson_sar_adc_gxbb_data = { .param = &meson_sar_adc_gxbb_param, .name = "meson-gxbb-saradc", @@ -952,6 +957,10 @@ static const struct of_device_id meson_sar_adc_of_match[] = { .data = &meson_sar_adc_meson8b_data, }, { + .compatible = "amlogic,meson8m2-saradc", + .data = &meson_sar_adc_meson8m2_data, + }, + { .compatible = "amlogic,meson-gxbb-saradc", .data = &meson_sar_adc_gxbb_data, }, { diff --git a/drivers/iio/adc/sc27xx_adc.c b/drivers/iio/adc/sc27xx_adc.c new file mode 100644 index 000000000000..2b60efea0c39 --- /dev/null +++ b/drivers/iio/adc/sc27xx_adc.c @@ -0,0 +1,522 @@ +// SPDX-License-Identifier: GPL-2.0 +// Copyright (C) 2018 Spreadtrum Communications Inc. + +#include <linux/hwspinlock.h> +#include <linux/iio/iio.h> +#include <linux/interrupt.h> +#include <linux/module.h> +#include <linux/of.h> +#include <linux/of_device.h> +#include <linux/platform_device.h> +#include <linux/regmap.h> + +/* PMIC global registers definition */ +#define SC27XX_MODULE_EN 0xc08 +#define SC27XX_MODULE_ADC_EN BIT(5) +#define SC27XX_ARM_CLK_EN 0xc10 +#define SC27XX_CLK_ADC_EN BIT(5) +#define SC27XX_CLK_ADC_CLK_EN BIT(6) + +/* ADC controller registers definition */ +#define SC27XX_ADC_CTL 0x0 +#define SC27XX_ADC_CH_CFG 0x4 +#define SC27XX_ADC_DATA 0x4c +#define SC27XX_ADC_INT_EN 0x50 +#define SC27XX_ADC_INT_CLR 0x54 +#define SC27XX_ADC_INT_STS 0x58 +#define SC27XX_ADC_INT_RAW 0x5c + +/* Bits and mask definition for SC27XX_ADC_CTL register */ +#define SC27XX_ADC_EN BIT(0) +#define SC27XX_ADC_CHN_RUN BIT(1) +#define SC27XX_ADC_12BIT_MODE BIT(2) +#define SC27XX_ADC_RUN_NUM_MASK GENMASK(7, 4) +#define SC27XX_ADC_RUN_NUM_SHIFT 4 + +/* Bits and mask definition for SC27XX_ADC_CH_CFG register */ +#define SC27XX_ADC_CHN_ID_MASK GENMASK(4, 0) +#define SC27XX_ADC_SCALE_MASK GENMASK(10, 8) +#define SC27XX_ADC_SCALE_SHIFT 8 + +/* Bits definitions for SC27XX_ADC_INT_EN registers */ +#define SC27XX_ADC_IRQ_EN BIT(0) + +/* Bits definitions for SC27XX_ADC_INT_CLR registers */ +#define SC27XX_ADC_IRQ_CLR BIT(0) + +/* Mask definition for SC27XX_ADC_DATA register */ +#define SC27XX_ADC_DATA_MASK GENMASK(11, 0) + +/* Timeout (ms) for the trylock of hardware spinlocks */ +#define SC27XX_ADC_HWLOCK_TIMEOUT 5000 + +/* Maximum ADC channel number */ +#define SC27XX_ADC_CHANNEL_MAX 32 + +/* ADC voltage ratio definition */ +#define SC27XX_VOLT_RATIO(n, d) \ + (((n) << SC27XX_RATIO_NUMERATOR_OFFSET) | (d)) +#define SC27XX_RATIO_NUMERATOR_OFFSET 16 +#define SC27XX_RATIO_DENOMINATOR_MASK GENMASK(15, 0) + +struct sc27xx_adc_data { + struct device *dev; + struct regmap *regmap; + /* + * One hardware spinlock to synchronize between the multiple + * subsystems which will access the unique ADC controller. + */ + struct hwspinlock *hwlock; + struct completion completion; + int channel_scale[SC27XX_ADC_CHANNEL_MAX]; + u32 base; + int value; + int irq; +}; + +struct sc27xx_adc_linear_graph { + int volt0;< |