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3 days[AArch64] Guessing the fixed performance countersHEADmasterdevelopCyrIng
3 days[AArch64] Verifying formulas against counter overflowsCyrIng
3 days[AArch64] Apply instruction counter computing overflow rulesCyrIng
4 days[AArch64] Allow user access to PMU countersCyrIng
5 days[AArch64] Marked the Tools feature as nominalCyrIng
5 days[AArch64] Rollback `BITWISESET` macro to a bitwise inclusive `OR`CyrIng
6 days[AArch64] Removed `LEGACY` ops and optimized `CORE_COUNT` macrosCyrIng
8 days[AArch64] Various macro functions improved in assembly languageCyrIng
10 days[AArch64] Providing Exclusive Load/Store to bitwise operationsCyrIng
11 days[AArch64] Providing atomic bit ops with Load/Store ExclusiveCyrIng
2024-04-28[x86_64] Version 1.97.21.97.2-x86_64CyrIng
2024-04-27[Intel] Prefetchers fix of L1 Scrubbing, L1 Next Page and L2 AMPCyrIng
2024-04-26[Intel] EEO and R2H bits inversion fix in MSR_POWER_CTL (0x1fc)CyrIng
2024-04-24[Intel] Reverse specification of MSR UNCORE_PERF_STATUSCyrIng
2024-04-17[AMD][Phoenix] Adding the unlocked Ryzen 8000 SeriesCyrIng
2024-04-17[AMD][Hawk Point] Adding Ryzen PRO processorsCyrIng
2024-04-05Version 1.97.11.97.1CyrIng
2024-04-05[AMD][Ryzen] Adding the Embedded 7000 and 8000 SeriesCyrIng
2024-04-05[AMD] CPUID bits completenessCyrIng
2024-04-03[AMD][Ryzen] Adding other Rembrandt-R and Dragon Range processorsCyrIng
2024-03-30[Intel] Added the ArrowLake/U entryCyrIng
2024-03-30[CLI] Fix spacing within the Power Monitor printCyrIng
2024-03-30[CR] Check source code widthCyrIng
2024-03-25[AMD][Zen] Don't process APU' topology as CPU ComplexCyrIng
2024-03-24[AArch64] When big.LITTLE detected, classify CPUs in Pcore & EcoreCyrIng
2024-03-24[AArch64] Estimates C1 counter from normalized TSCCyrIng
2024-03-23[AMD][Zen4/Hawk Point] Set default thermal scope to Package (#84)CyrIng
2024-03-22[UI] Avoid a crash when `stateLimit` greater or equal `stateCount`CyrIng
2024-03-20[AMD][Genoa] Don't decode CPB ratio from `SMU_AMD_F17H_ZEN2_MCM_COF`CyrIng
2024-03-20[CR][AMD] Make sure not to mask Thermal Trip eventCyrIng
2024-03-19[CR][AMD] Optimized function for ThermTrip eventsCyrIng
2024-03-18[AMD][Bergamo][Storm Peak] Moved thermal query to Genoa functionCyrIng
2024-03-18[AMD][Genoa] Added new thermal query based on offset `0x300`CyrIng
2024-03-18[AMD][Bergamo][Storm Peak] Changed thermal function pointerCyrIng
2024-03-18[AMD][Genoa] Changed thermal function pointerCyrIng
2024-03-17[AMD][Phoenix] Normalize the UMC channelsCyrIng
2024-03-17[AMD][Zen4] Temperature for Genoa, Hawk Point, Bergamo, Storm PeakCyrIng
2024-03-17[AMD] Added "Hawk Point" processors sourced from Chinese databaseCyrIng
2024-03-16[CR] Essential kernel module optimizationsCyrIng
2024-03-11[AArch64][DynamIQ] Query the product revisionCyrIng
2024-03-10[AArch64] Hypervisor is disabled if Bare-Metal detectedCyrIng
2024-03-10[AArch64] Guess virtualization from SMBIOS stringsCyrIng
2024-03-09[AArch64] DynamIQ entryCyrIng
2024-03-07[AArch64] Read CPPC registers from ACPI if implemented by firmwareCyrIng
2024-03-07[AArch64] Keep max ratio within OPP and Hybrid listsCyrIng
2024-03-02[AArch64] Cleaning up BCLK computationCyrIng
2024-02-28[AArch64] Features PFAR, DF2, SEL2, ECBHB addedCyrIng
2024-02-27[Intel][Goldmont & Denverton] Changed Power Unit formulasCyrIng
2024-02-25[AArch64] Adding features of ID_AA64PFR1_EL1CyrIng
2024-02-25[AArch64] Adding other features from ID_AA64ISAR2_EL1CyrIng
generated by cgit v1.2.3 (git 2.25.1) at 2024-05-15 16:53:09 +0000