diff options
| author | CyrIng <labs@cyring.fr> | 2022-08-26 01:13:46 +0000 |
|---|---|---|
| committer | CyrIng <labs@cyring.fr> | 2022-08-26 01:13:46 +0000 |
| commit | d9e8932f0e7287427a2863e1775a84e323c16df2 (patch) | |
| tree | 9562486cbee1c9aa72635434cb66bf87f7b53f80 | |
| parent | 932f88e87d06281c75f3260b141d6d6aacc8d127 (diff) | |
[Intel][Alder Lake] Added default case if Processor has only Pcores1.91.7
| -rw-r--r-- | corefreqk.c | 2 | ||||
| -rw-r--r-- | coretypes.h | 2 |
2 files changed, 3 insertions, 1 deletions
diff --git a/corefreqk.c b/corefreqk.c index 29914b9..f94d5ed 100644 --- a/corefreqk.c +++ b/corefreqk.c @@ -16743,6 +16743,7 @@ static void InitTimer_Alderlake(unsigned int cpu) case Hybrid_Core: case Hybrid_RSVD1: case Hybrid_RSVD2: + default: smp_call_function_single(cpu, InitTimer, Cycle_Alderlake_Pcore, 1); break; } @@ -16773,6 +16774,7 @@ static void Start_Alderlake(void *arg) case Hybrid_Core: case Hybrid_RSVD1: case Hybrid_RSVD2: + default: SMT_Counters_Alderlake_Pcore(Core, 0); if (Core->Bind == PUBLIC(RO(Proc))->Service.Core) diff --git a/coretypes.h b/coretypes.h index d38e25a..644de19 100644 --- a/coretypes.h +++ b/coretypes.h @@ -6,7 +6,7 @@ #define COREFREQ_MAJOR 1 #define COREFREQ_MINOR 91 -#define COREFREQ_REV 6 +#define COREFREQ_REV 7 #if !defined(CORE_COUNT) #define CORE_COUNT 256 |