diff options
| author | CyrIng <labs@cyring.fr> | 2023-01-22 13:37:16 +0000 |
|---|---|---|
| committer | CyrIng <cyril.ingenierie@gmail.com> | 2023-01-22 13:37:16 +0000 |
| commit | d4165cf99e969061ebf44f4470bd5584d90cace9 (patch) | |
| tree | 8ea2b3b3858a98b8b5dfa77f76532295d515f0ba | |
| parent | 37a0c0fba1af63522542d36bf4e8bc54a7939027 (diff) | |
[UI] Split `tREFI` in two cells in `Timing_DDR4`
| -rw-r--r-- | corefreq-cli.c | 10 |
1 files changed, 8 insertions, 2 deletions
diff --git a/corefreq-cli.c b/corefreq-cli.c index a171d64..973c4f2 100644 --- a/corefreq-cli.c +++ b/corefreq-cli.c @@ -7200,6 +7200,8 @@ void Timing_DDR4(Window *win, } for (cha = 0; cha < RO(Shm)->Uncore.MC[mc].ChannelCount; cha++) { + char str[16]; + PRT(IMC, attrib[0], "\x20\x20#%-2u", cha); PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tWRWR_SG); @@ -7207,10 +7209,14 @@ void Timing_DDR4(Window *win, PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tWRWR_DR); PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tWRWR_DD); - for (nc = 0; nc < (MC_MATX - 11); nc++) { + for (nc = 0; nc < (MC_MATX - 12); nc++) { PRT(IMC, attrib[0], MEM_CTRL_FMT, MC_MATY, HSPACE); } - PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tREFI); + + iSplit(TIMING(mc, cha).tREFI, str); + PRT(IMC, attrib[1], "%5s", &str[0]); + PRT(IMC, attrib[1], "%5s", &str[8]); + PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tRFC); PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tXS); PRT(IMC, attrib[1], "%5u", TIMING(mc, cha).tXP); |