diff options
author | Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu> | 2023-01-26 17:26:51 +0100 |
---|---|---|
committer | Hugo Landau <hlandau@openssl.org> | 2023-10-26 15:55:49 +0100 |
commit | 9c22a240dab51dc9a5583d36726b81073f9c8d34 (patch) | |
tree | 527309ec36368aa809d48acd3b0eec6ae1d4322d /include/crypto | |
parent | db44a69aa5ce4bdc3e232ad9d7216af0eda65836 (diff) |
riscv: sha512: Provide a Zvknhb-based implementation
The upcoming RISC-V vector crypto extensions feature
a Zvknhb extension, that provides sha512-specific istructions.
This patch provides an implementation that utilizes this
extension if available.
Tested on QEMU and no regressions observed.
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
Reviewed-by: Hugo Landau <hlandau@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)
Diffstat (limited to 'include/crypto')
-rw-r--r-- | include/crypto/riscv_arch.def | 1 | ||||
-rw-r--r-- | include/crypto/riscv_arch.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/crypto/riscv_arch.def b/include/crypto/riscv_arch.def index 6462d30156..2d823a5c7a 100644 --- a/include/crypto/riscv_arch.def +++ b/include/crypto/riscv_arch.def @@ -38,6 +38,7 @@ RISCV_DEFINE_CAP(ZVBC, 0, 16) RISCV_DEFINE_CAP(ZVKG, 0, 17) RISCV_DEFINE_CAP(ZVKNED, 0, 18) RISCV_DEFINE_CAP(ZVKNHA, 0, 19) +RISCV_DEFINE_CAP(ZVKNHB, 0, 20) /* * In the future ... diff --git a/include/crypto/riscv_arch.h b/include/crypto/riscv_arch.h index 54a790d5a6..bc05e2f339 100644 --- a/include/crypto/riscv_arch.h +++ b/include/crypto/riscv_arch.h @@ -61,6 +61,7 @@ static const size_t kRISCVNumCaps = #define RISCV_HAS_ZBKB_AND_ZKND_AND_ZKNE() (RISCV_HAS_ZBKB() && RISCV_HAS_ZKND() && RISCV_HAS_ZKNE()) #define RISCV_HAS_ZKND_AND_ZKNE() (RISCV_HAS_ZKND() && RISCV_HAS_ZKNE()) #define RISCV_HAS_ZVBB_AND_ZVKNHA() (RISCV_HAS_ZVBB() && RISCV_HAS_ZVKNHA()) +#define RISCV_HAS_ZVBB_AND_ZVKNHB() (RISCV_HAS_ZVBB() && RISCV_HAS_ZVKNHB()) /* * Get the size of a vector register in bits (VLEN). |