diff options
| author | Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu> | 2023-01-26 14:58:30 +0100 |
|---|---|---|
| committer | Hugo Landau <hlandau@openssl.org> | 2023-10-26 15:55:49 +0100 |
| commit | 17073066520dbbf1ef3ce4856c570d61e9548083 (patch) | |
| tree | 343ac61f6a0ccb625d7bafe791c2cce28f0eb870 /include/crypto | |
| parent | 204a1c9854193bd7fcc3ea1baaf685c9a67d17bb (diff) | |
riscv: sha256: Provide a Zvknha-based implementation
The upcoming RISC-V vector crypto extensions feature
a Zvknha extension, that provides sha256-specific instructions.
This patch provides an implementation that utilizes this
extension if available.
Tested on QEMU and no regressions observed.
Signed-off-by: Charalampos Mitrodimas <charalampos.mitrodimas@vrull.eu>
Signed-off-by: Christoph Müllner <christoph.muellner@vrull.eu>
Reviewed-by: Tomas Mraz <tomas@openssl.org>
Reviewed-by: Paul Dale <pauli@openssl.org>
Reviewed-by: Hugo Landau <hlandau@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/21923)
Diffstat (limited to 'include/crypto')
| -rw-r--r-- | include/crypto/riscv_arch.def | 1 | ||||
| -rw-r--r-- | include/crypto/riscv_arch.h | 1 |
2 files changed, 2 insertions, 0 deletions
diff --git a/include/crypto/riscv_arch.def b/include/crypto/riscv_arch.def index d727ef7824..6462d30156 100644 --- a/include/crypto/riscv_arch.def +++ b/include/crypto/riscv_arch.def @@ -37,6 +37,7 @@ RISCV_DEFINE_CAP(ZVBB, 0, 15) RISCV_DEFINE_CAP(ZVBC, 0, 16) RISCV_DEFINE_CAP(ZVKG, 0, 17) RISCV_DEFINE_CAP(ZVKNED, 0, 18) +RISCV_DEFINE_CAP(ZVKNHA, 0, 19) /* * In the future ... diff --git a/include/crypto/riscv_arch.h b/include/crypto/riscv_arch.h index 8bd281ad80..54a790d5a6 100644 --- a/include/crypto/riscv_arch.h +++ b/include/crypto/riscv_arch.h @@ -60,6 +60,7 @@ static const size_t kRISCVNumCaps = #define RISCV_HAS_ZBB_AND_ZBC() (RISCV_HAS_ZBB() && RISCV_HAS_ZBC()) #define RISCV_HAS_ZBKB_AND_ZKND_AND_ZKNE() (RISCV_HAS_ZBKB() && RISCV_HAS_ZKND() && RISCV_HAS_ZKNE()) #define RISCV_HAS_ZKND_AND_ZKNE() (RISCV_HAS_ZKND() && RISCV_HAS_ZKNE()) +#define RISCV_HAS_ZVBB_AND_ZVKNHA() (RISCV_HAS_ZVBB() && RISCV_HAS_ZVKNHA()) /* * Get the size of a vector register in bits (VLEN). |