diff options
author | Andy Polyakov <appro@openssl.org> | 2005-11-03 15:23:11 +0000 |
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committer | Andy Polyakov <appro@openssl.org> | 2005-11-03 15:23:11 +0000 |
commit | 7a6f825f0f7a7a4c6fe63c766bf6a16bd6be05db (patch) | |
tree | 25d0e78e2a30ac39a35e2989d08abf75cac62b16 /crypto | |
parent | 29afd31dd19d1986dfc27e48a8bb0904827d9c77 (diff) |
Make pshufw optional and update performance table in sha512-sse2.pl
[as per http://cvs.openssl.org/chngview?cn=14551].
Diffstat (limited to 'crypto')
-rw-r--r-- | crypto/perlasm/x86unix.pl | 6 | ||||
-rw-r--r-- | crypto/sha/asm/sha512-sse2.pl | 2 |
2 files changed, 4 insertions, 4 deletions
diff --git a/crypto/perlasm/x86unix.pl b/crypto/perlasm/x86unix.pl index 38c7a6df42..8b6e502cfb 100644 --- a/crypto/perlasm/x86unix.pl +++ b/crypto/perlasm/x86unix.pl @@ -227,9 +227,9 @@ sub main'pxor { &out2("pxor",@_); } sub main'por { &out2("por",@_); } sub main'pand { &out2("pand",@_); } sub main'movq { - local($p1,$p2)=@_; - if ($p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/) - # movq between mmx registers sinks Intel CPUs + local($p1,$p2,$optimize)=@_; + if ($optimize && $p1=~/^mm[0-7]$/ && $p2=~/^mm[0-7]$/) + # movq between mmx registers can sink Intel CPUs { push(@out,"\tpshufw\t\$0xe4,%$p2,%$p1\n"); } else { &out2("movq",@_); } } diff --git a/crypto/sha/asm/sha512-sse2.pl b/crypto/sha/asm/sha512-sse2.pl index 10902bf673..6c0a4c4d4e 100644 --- a/crypto/sha/asm/sha512-sse2.pl +++ b/crypto/sha/asm/sha512-sse2.pl @@ -22,7 +22,7 @@ # # 2.4GHz P4 1.4GHz AMD32 1.4GHz AMD64(*) # SHA256/gcc(*) 54 43 59 -# SHA512/gcc 17 23 92 +# SHA512/gcc 21 24 92 # SHA512/sse2 61(**) 57(**) # SHA512/icc 26 28 # SHA256/icc(*) 65 54 |