diff options
| author | Andy Polyakov <appro@openssl.org> | 2007-11-11 19:44:42 +0000 |
|---|---|---|
| committer | Andy Polyakov <appro@openssl.org> | 2007-11-11 19:44:42 +0000 |
| commit | 095db72024d34163aa327997f5808b8c3a01f3ea (patch) | |
| tree | 6af9a3843cfcffb3c7028d37638cb5057748ecce /crypto/x86cpuid.pl | |
| parent | 11eb172b6e97b6fd15fa42d446b1f70d72494069 (diff) | |
x86cpuid.pl update [from HEAD].
Diffstat (limited to 'crypto/x86cpuid.pl')
| -rw-r--r-- | crypto/x86cpuid.pl | 32 |
1 files changed, 30 insertions, 2 deletions
diff --git a/crypto/x86cpuid.pl b/crypto/x86cpuid.pl index c53c9bc998..4408ef2936 100644 --- a/crypto/x86cpuid.pl +++ b/crypto/x86cpuid.pl @@ -19,13 +19,41 @@ for (@ARGV) { $sse2=1 if (/-DOPENSSL_IA32_SSE2/); } &pop ("eax"); &xor ("ecx","eax"); &bt ("ecx",21); - &jnc (&label("nocpuid")); + &jnc (&label("done")); + &xor ("eax","eax"); + &cpuid (); + &xor ("eax","eax"); + &cmp ("ebx",0x756e6547); # "Genu" + &data_byte(0x0f,0x95,0xc0); #&setne (&LB("eax")); + &mov ("ebp","eax"); + &cmp ("edx",0x49656e69); # "ineI" + &data_byte(0x0f,0x95,0xc0); #&setne (&LB("eax")); + &or ("ebp","eax"); + &cmp ("ecx",0x6c65746e); # "ntel" + &data_byte(0x0f,0x95,0xc0); #&setne (&LB("eax")); + &or ("ebp","eax"); &mov ("eax",1); &cpuid (); -&set_label("nocpuid"); + &cmp ("ebp",0); + &jne (&label("notP4")); + &and ("eax",15<<8); # familiy ID + &cmp ("eax",15<<8); # P4? + &jne (&label("notP4")); + &or ("edx",1<<20); # use reserved bit to engage RC4_CHAR +&set_label("notP4"); + &bt ("edx",28); # test hyper-threading bit + &jnc (&label("done")); + &shr ("ebx",16); + &and ("ebx",0xff); + &cmp ("ebx",1); # see if cache is shared(*) + &ja (&label("done")); + &and ("edx",0xefffffff); # clear hyper-threading bit if not +&set_label("done"); &mov ("eax","edx"); &mov ("edx","ecx"); &function_end("OPENSSL_ia32_cpuid"); +# (*) on Core2 this value is set to 2 denoting the fact that L2 +# cache is shared between cores. &external_label("OPENSSL_ia32cap_P"); |