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authorH.J. Lu <hongjiu.lu@intel.com>2020-01-31 04:17:26 -0800
committerRichard Levitte <levitte@openssl.org>2020-02-15 22:15:03 +0100
commit98ad3fe82bd3e7e7f929dd1fa4ef3915426002c0 (patch)
tree90305d8bdb22f19188d925136cdd25b2d13f9b03 /crypto/poly1305
parent07980622e28746245a83ad9d011b6a4a32a1c2e0 (diff)
x86_64: Add endbranch at function entries for Intel CET
To support Intel CET, all indirect branch targets must start with endbranch. Here is a patch to add endbranch to function entries in x86_64 assembly codes which are indirect branch targets as discovered by running openssl testsuite on Intel CET machine and visual inspection. Verified with $ CC="gcc -Wl,-z,cet-report=error" ./Configure shared linux-x86_64 -fcf-protection $ make $ make test and $ CC="gcc -mx32 -Wl,-z,cet-report=error" ./Configure shared linux-x32 -fcf-protection $ make $ make test # <<< passed with https://github.com/openssl/openssl/pull/10988 Reviewed-by: Tomas Mraz <tmraz@fedoraproject.org> Reviewed-by: Richard Levitte <levitte@openssl.org> (Merged from https://github.com/openssl/openssl/pull/10982)
Diffstat (limited to 'crypto/poly1305')
-rwxr-xr-xcrypto/poly1305/asm/poly1305-x86_64.pl2
1 files changed, 2 insertions, 0 deletions
diff --git a/crypto/poly1305/asm/poly1305-x86_64.pl b/crypto/poly1305/asm/poly1305-x86_64.pl
index c03af53922..e5b841260e 100755
--- a/crypto/poly1305/asm/poly1305-x86_64.pl
+++ b/crypto/poly1305/asm/poly1305-x86_64.pl
@@ -2808,6 +2808,7 @@ $code.=<<___;
.align 32
poly1305_blocks_vpmadd52:
.cfi_startproc
+ endbranch
shr \$4,$len
jz .Lno_data_vpmadd52 # too short
@@ -3741,6 +3742,7 @@ $code.=<<___;
.align 32
poly1305_emit_base2_44:
.cfi_startproc
+ endbranch
mov 0($ctx),%r8 # load hash value
mov 8($ctx),%r9
mov 16($ctx),%r10