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authorHenry Brausen <henry.brausen@vrull.eu>2022-01-28 01:53:07 -0700
committerTomas Mraz <tomas@openssl.org>2022-11-21 10:49:52 +0100
commit58901bfaf9f195c9056bcc4986e7d2283373ddea (patch)
treedcad402cfbef069d5f8a292913df549ca173c05f /crypto/modes/build.info
parent8448432a3be6cd5eb2576594c742e3d54d92f78a (diff)
Add clmul-based gmult for riscv64 with Zbb, Zbc
ghash-riscv64.pl implements 128-bit galois field multiplication for use in the GCM mode using RISC-V carryless multiplication primitives. The clmul-accelerated routine can be selected by setting the Zbb and Zbc bits of the OPENSSL_riscvcap environment variable at runtime. Reviewed-by: Philipp Tomsich <philipp.tomsich@vrull.eu> Signed-off-by: Henry Brausen <henry.brausen@vrull.eu> Reviewed-by: Tomas Mraz <tomas@openssl.org> Reviewed-by: Paul Dale <pauli@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17640) (cherry picked from commit 999376dcf33986c468361ede16fa9de409dc4e2e)
Diffstat (limited to 'crypto/modes/build.info')
-rw-r--r--crypto/modes/build.info4
1 files changed, 4 insertions, 0 deletions
diff --git a/crypto/modes/build.info b/crypto/modes/build.info
index 0c0c9c3b80..792fff67b7 100644
--- a/crypto/modes/build.info
+++ b/crypto/modes/build.info
@@ -40,6 +40,9 @@ IF[{- !$disabled{asm} -}]
$MODESASM_c64xplus=ghash-c64xplus.s
$MODESDEF_c64xplus=GHASH_ASM
+ $MODESASM_riscv64=ghash-riscv64.s
+ $MODESDEF_riscv64=GHASH_ASM
+
# Now that we have defined all the arch specific variables, use the
# appropriate one, and define the appropriate macros
IF[$MODESASM_{- $target{asm_arch} -}]
@@ -84,3 +87,4 @@ INCLUDE[aes-gcm-armv8-unroll8_64.o]=..
GENERATE[ghash-s390x.S]=asm/ghash-s390x.pl
INCLUDE[ghash-s390x.o]=..
GENERATE[ghash-c64xplus.S]=asm/ghash-c64xplus.pl
+GENERATE[ghash-riscv64.s]=asm/ghash-riscv64.pl