diff options
author | Shane Lontis <shane.lontis@oracle.com> | 2019-08-26 17:05:08 +1000 |
---|---|---|
committer | Shane Lontis <shane.lontis@oracle.com> | 2019-08-26 17:05:08 +1000 |
commit | 4a42e2640499ce46d2733c4316c5fe4594a37c54 (patch) | |
tree | fe7235c50a838af626b46199beed5f85cb4e8b94 /crypto/include/internal | |
parent | 37a830e729f56cfc7b893f321880ac52f1b35cdb (diff) |
Cleanup ciphers and Add 3des ciphers.
Moved the relevant ciphers into default and restructed headers to allow the move.
This removed most of the cases of #ifdef NO_XXX (which are now specified in build.info)
Reviewed-by: Richard Levitte <levitte@openssl.org>
(Merged from https://github.com/openssl/openssl/pull/9482)
Diffstat (limited to 'crypto/include/internal')
-rw-r--r-- | crypto/include/internal/ciphermode_platform.h | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/crypto/include/internal/ciphermode_platform.h b/crypto/include/internal/ciphermode_platform.h index 934d8136d3..5db2e23eb9 100644 --- a/crypto/include/internal/ciphermode_platform.h +++ b/crypto/include/internal/ciphermode_platform.h @@ -223,6 +223,7 @@ void cmll256_t4_ctr32_encrypt(const unsigned char *in, unsigned char *out, # define SPARC_AES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_AES) +# define SPARC_DES_CAPABLE (OPENSSL_sparcv9cap_P[1] & CFR_DES) # define HWAES_CAPABLE (OPENSSL_sparcv9cap_P[0] & SPARCV9_FJAESX) # define HWAES_set_encrypt_key aes_fx_set_encrypt_key # define HWAES_set_decrypt_key aes_fx_set_decrypt_key @@ -237,6 +238,12 @@ void aes_t4_encrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key); void aes_t4_decrypt(const unsigned char *in, unsigned char *out, const AES_KEY *key); +void des_t4_key_expand(const void *key, DES_key_schedule *ks); +void des_t4_ede3_cbc_encrypt(const void *inp, void *out, size_t len, + const DES_key_schedule ks[3], unsigned char iv[8]); +void des_t4_ede3_cbc_decrypt(const void *inp, void *out, size_t len, + const DES_key_schedule ks[3], unsigned char iv[8]); + /* * Key-length specific subroutines were chosen for following reason. * Each SPARC T4 core can execute up to 8 threads which share core's |