diff options
| author | Matt Caswell <matt@openssl.org> | 2017-11-28 16:19:57 +0000 |
|---|---|---|
| committer | Matt Caswell <matt@openssl.org> | 2018-02-20 12:59:30 +0000 |
| commit | ff489fb4725b120a9da05d339595bc7799c53802 (patch) | |
| tree | f5794a81ca61c85e0ed37053d5114fb4de64dc7c /crypto/ec/curve448 | |
| parent | 094c071cbf3bca19eee73ccb8dfc0f7498f5d8e1 (diff) | |
Integrate Curve448 into the build system
Reviewed-by: Bernd Edlinger <bernd.edlinger@hotmail.de>
(Merged from https://github.com/openssl/openssl/pull/5105)
Diffstat (limited to 'crypto/ec/curve448')
| -rw-r--r-- | crypto/ec/curve448/word.h | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/crypto/ec/curve448/word.h b/crypto/ec/curve448/word.h index 9f62654b6e..5afe85a166 100644 --- a/crypto/ec/curve448/word.h +++ b/crypto/ec/curve448/word.h @@ -26,7 +26,7 @@ #if defined(__ARM_NEON__) #include <arm_neon.h> #elif defined(__SSE2__) - #if !defined(__GNUC__) || __clang__ || __GNUC__ >= 5 || (__GNUC__==4 && __GNUC_MINOR__ >= 4) + #if !defined(__GNUC__) || defined(__clang__) || __GNUC__ >= 5 || (__GNUC__==4 && __GNUC_MINOR__ >= 4) #include <immintrin.h> #else #include <emmintrin.h> @@ -60,7 +60,7 @@ #ifdef __ARM_NEON__ typedef uint32x4_t vecmask_t; -#elif __clang__ +#elif defined(__clang__) typedef uint64_t uint64x2_t __attribute__((ext_vector_type(2))); typedef int64_t int64x2_t __attribute__((ext_vector_type(2))); typedef uint64_t uint64x4_t __attribute__((ext_vector_type(4))); @@ -86,7 +86,7 @@ typedef word_t vecmask_t __attribute__((vector_size(32))); #endif -#if __AVX2__ +#if defined(__AVX2__) #define VECTOR_ALIGNED __attribute__((aligned(32))) typedef uint32x8_t big_register_t; typedef uint64x4_t uint64xn_t; @@ -98,7 +98,7 @@ big_register_t ret = {y,y,y,y,y,y,y,y}; return ret; } -#elif __SSE2__ +#elif defined(__SSE2__) #define VECTOR_ALIGNED __attribute__((aligned(16))) typedef uint32x4_t big_register_t; typedef uint64x2_t uint64xn_t; @@ -110,7 +110,7 @@ big_register_t ret = {y,y,y,y}; return ret; } -#elif __ARM_NEON__ +#elif defined(__ARM_NEON__) #define VECTOR_ALIGNED __attribute__((aligned(16))) typedef uint32x4_t big_register_t; typedef uint64x2_t uint64xn_t; @@ -120,7 +120,8 @@ br_set_to_mask(mask_t x) { return vdupq_n_u32(x); } -#elif _WIN64 || __amd64__ || __X86_64__ || __aarch64__ +#elif defined(_WIN64) || defined(__amd64__) || defined(__X86_64__) \ + || defined(__aarch64__) #define VECTOR_ALIGNED __attribute__((aligned(8))) typedef uint64_t big_register_t, uint64xn_t; @@ -141,18 +142,18 @@ } #endif -#if __AVX2__ +#if defined(__AVX2__) static ossl_inline big_register_t br_is_zero(big_register_t x) { return (big_register_t)(x == br_set_to_mask(0)); } -#elif __SSE2__ +#elif defined(__SSE2__) static ossl_inline big_register_t br_is_zero(big_register_t x) { return (big_register_t)_mm_cmpeq_epi32((__m128i)x, _mm_setzero_si128()); //return (big_register_t)(x == br_set_to_mask(0)); } -#elif __ARM_NEON__ +#elif defined(__ARM_NEON__) static ossl_inline big_register_t br_is_zero(big_register_t x) { return vceqq_u32(x,x^x); |