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authorBen Avison <bavison@riscosopen.org>2022-03-29 14:33:13 +0100
committerTomas Mraz <tomas@openssl.org>2022-03-30 17:13:56 +0200
commit2bd5cde57e748d6ff21ed26cb448835f86b86ea1 (patch)
tree0b8d742d51dc0a041c9a4769e70e88beb8a2dcfa /crypto/aes
parentdb44b55aaa42141921217183667800425227b658 (diff)
Remove further uses of __ARMEL__ in AArch64 assembly
The sweep of the source tree in #17373 missed the BSAES assembly due its PR #14592 having been temporarily backed out at the time. This constitutes a partial fix for #17958 - covers cases except when configured with -DOPENSSL_AES_CONST_TIME. Reviewed-by: Matt Caswell <matt@openssl.org> Reviewed-by: Tomas Mraz <tomas@openssl.org> (Merged from https://github.com/openssl/openssl/pull/17988)
Diffstat (limited to 'crypto/aes')
-rw-r--r--crypto/aes/asm/bsaes-armv8.pl10
1 files changed, 5 insertions, 5 deletions
diff --git a/crypto/aes/asm/bsaes-armv8.pl b/crypto/aes/asm/bsaes-armv8.pl
index 5270ca7c62..8519c4bc96 100644
--- a/crypto/aes/asm/bsaes-armv8.pl
+++ b/crypto/aes/asm/bsaes-armv8.pl
@@ -951,7 +951,7 @@ _bsaes_encrypt8_alt:
// v15 = last round key (converted to native endianness)
// other SIMD registers corrupted
_bsaes_key_convert:
-#ifdef __ARMEL__
+#ifdef __AARCH64EL__
adr x11, .LM0_littleendian
#else
adr x11, .LM0_bigendian
@@ -970,7 +970,7 @@ _bsaes_key_convert:
movi v22.16b, #0x40
movi v23.16b, #0x80
-#ifdef __ARMEL__
+#ifdef __AARCH64EL__
rev32 v0.16b, v0.16b
#endif
sub x10, x10, #1
@@ -996,7 +996,7 @@ _bsaes_key_convert:
cbnz x10, .Lkey_loop
// don't save last round key
-#ifdef __ARMEL__
+#ifdef __AARCH64EL__
rev32 v15.16b, v15.16b
adr x11, .LM0_bigendian
#endif
@@ -1429,7 +1429,7 @@ ossl_bsaes_ctr32_encrypt_blocks:
mov x22, x3
ldr w23, [x4, #12] // load counter .LSW
ldr q1, [x4] // load whole counter value
-#ifdef __ARMEL__
+#ifdef __AARCH64EL__
rev w23, w23
#endif
str q1, [sp, #80] // copy counter value
@@ -1444,7 +1444,7 @@ ossl_bsaes_ctr32_encrypt_blocks:
ldr q0, [x19], #16 // load input
ldr q1, [sp, #64] // load encrypted counter
add x23, x23, #1
-#ifdef __ARMEL__
+#ifdef __AARCH64EL__
rev w0, w23
str w0, [sp, #80+12] // next counter value
#else