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// SPDX-License-Identifier: GPL-2.0
//
// MediaTek ALSA SoC Audio DAI TDM Control
//
// Copyright (c) 2018 MediaTek Inc.
// Author: KaiChieh Chuang <kaichieh.chuang@mediatek.com>
#include <linux/regmap.h>
#include <sound/pcm_params.h>
#include "mt8183-afe-clk.h"
#include "mt8183-afe-common.h"
#include "mt8183-interconnection.h"
#include "mt8183-reg.h"
struct mtk_afe_tdm_priv {
int bck_id;
int bck_rate;
int mclk_id;
int mclk_multiple; /* according to sample rate */
int mclk_rate;
int mclk_apll;
};
enum {
TDM_WLEN_16_BIT = 1,
TDM_WLEN_32_BIT = 2,
};
enum {
TDM_CHANNEL_BCK_16 = 0,
TDM_CHANNEL_BCK_24 = 1,
TDM_CHANNEL_BCK_32 = 2,
};
enum {
TDM_CHANNEL_NUM_2 = 0,
TDM_CHANNEL_NUM_4 = 1,
TDM_CHANNEL_NUM_8 = 2,
};
enum {
TDM_CH_START_O30_O31 = 0,
TDM_CH_START_O32_O33,
TDM_CH_START_O34_O35,
TDM_CH_START_O36_O37,
TDM_CH_ZERO,
};
enum {
HDMI_BIT_WIDTH_16_BIT = 0,
HDMI_BIT_WIDTH_32_BIT = 1,
};
static unsigned int get_hdmi_wlen(snd_pcm_format_t format)
{
return snd_pcm_format_physical_width(format) <= 16 ?
HDMI_BIT_WIDTH_16_BIT : HDMI_BIT_WIDTH_32_BIT;
}
static unsigned int get_tdm_wlen(snd_pcm_format_t format)
{
return snd_pcm_format_physical_width(format) <= 16 ?
TDM_WLEN_16_BIT : TDM_WLEN_32_BIT;
}
static unsigned int get_tdm_channel_bck(snd_pcm_format_t format)
{
return snd_pcm_format_physical_width(format) <= 16 ?
TDM_CHANNEL_BCK_16 : TDM_CHANNEL_BCK_32;
}
static unsigned int get_tdm_lrck_width(snd_pcm_format_t format)
{
return snd_pcm_format_physical_width(format) - 1;
}
static unsigned int get_tdm_ch(unsigned int ch)
{
switch (ch) {
case 1:
case 2:
return TDM_CHANNEL_NUM_2;
case 3:
case 4:
return TDM_CHANNEL_NUM_4;
case 5:
case 6:
case 7:
case 8:
default:
return TDM_CHANNEL_NUM_8;
}
}
/* interconnection */
enum {
HDMI_CONN_CH0 = 0,
HDMI_CONN_CH1,
HDMI_CONN_CH2,
HDMI_CONN_CH3,
HDMI_CONN_CH4,
HDMI_CONN_CH5,
HDMI_CONN_CH6,
HDMI_CONN_CH7,
};
static const char *const hdmi_conn_mux_map[] = {
"CH0", "CH1", "CH2", "CH3",
"CH4", "CH5", "CH6", "CH7",
};
static int hdmi_conn_mux_map_value[] = {
HDMI_CONN_CH0,
HDMI_CONN_CH1,
HDMI_CONN_CH2,
HDMI_CONN_CH3,
HDMI_CONN_CH4,
HDMI_CONN_CH5,
HDMI_CONN_CH6,
HDMI_CONN_CH7,
};
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch0_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_0_SFT,
HDMI_O_0_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch0_mux_control =
SOC_DAPM_ENUM("HDMI_CH0_MUX", hdmi_ch0_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch1_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_1_SFT,
HDMI_O_1_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch1_mux_control =
SOC_DAPM_ENUM("HDMI_CH1_MUX", hdmi_ch1_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch2_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_2_SFT,
HDMI_O_2_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch2_mux_control =
SOC_DAPM_ENUM("HDMI_CH2_MUX", hdmi_ch2_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch3_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_3_SFT,
HDMI_O_3_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch3_mux_control =
SOC_DAPM_ENUM("HDMI_CH3_MUX", hdmi_ch3_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch4_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_4_SFT,
HDMI_O_4_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch4_mux_control =
SOC_DAPM_ENUM("HDMI_CH4_MUX", hdmi_ch4_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch5_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_5_SFT,
HDMI_O_5_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch5_mux_control =
SOC_DAPM_ENUM("HDMI_CH5_MUX", hdmi_ch5_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch6_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_6_SFT,
HDMI_O_6_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch6_mux_control =
SOC_DAPM_ENUM("HDMI_CH6_MUX", hdmi_ch6_mux_map_enum);
static SOC_VALUE_ENUM_SINGLE_DECL(hdmi_ch7_mux_map_enum,
AFE_HDMI_CONN0,
HDMI_O_7_SFT,
HDMI_O_7_MASK,
hdmi_conn_mux_map,
hdmi_conn_mux_map_value);
static const struct snd_kcontrol_new hdmi_ch7_mux_control =
SOC_DAPM_ENUM("HDMI_CH7_MUX", hdmi_ch7_mux_map_enum);
enum {
SUPPLY_SEQ_APLL,
SUPPLY_SEQ_TDM_MCK_EN,
SUPPLY_SEQ_TDM_BCK_EN,
};
static int mtk_tdm_bck_en_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
struct mt8183_afe_private *afe_priv = afe->platform_priv;
struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[MT8183_DAI_TDM];
dev_info(cmpnt->dev, "%s(), name %s, event 0x%x\n",
__func__, w->name, event);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
mt8183_mck_enable(afe, tdm_priv->bck_id, tdm_priv->bck_rate);
break;
case SND_SOC_DAPM_POST_PMD:
mt8183_mck_disable(afe, tdm_priv->bck_id);
break;
default:
break;
}
return 0;
}
static int mtk_tdm_mck_en_event(struct snd_soc_dapm_widget *w,
struct snd_kcontrol *kcontrol,
int event)
{
struct snd_soc_component *cmpnt = snd_soc_dapm_to_component(w->dapm);
struct mtk_base_afe *afe = snd_soc_component_get_drvdata(cmpnt);
struct mt8183_afe_private *afe_priv = afe->platform_priv;
struct mtk_afe_tdm_priv *tdm_priv = afe_priv->dai_priv[MT8183_DAI_TDM];
dev_info(cmpnt->dev, "%s(), name %s, event 0x%x\n",
__func__, w->name, event);
switch (event) {
case SND_SOC_DAPM_PRE_PMU:
mt8183_mck_enable(afe, tdm_priv->mclk_id, tdm_priv->mclk_rate);
break;
case SND_SOC_DAPM_POST_PMD:
tdm_priv->mclk_rate = 0;
mt8183_mck_disable(afe, tdm_priv->mclk_id);
break;
default:
break;
}
return 0;
}
static const struct snd_soc_dapm_widget mtk_dai_tdm_widgets[] = {
SND_SOC_DAPM_MUX("HDMI_CH0_MUX", SND_SOC_NOPM, 0, 0,
&hdmi_ch0_mux_control),
SND_SOC_DAPM_MUX("HDMI_CH1_MUX", SND_SOC_NOPM, 0, 0,
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