// SPDX-License-Identifier: GPL-2.0
// TLV320ADCX140 Sound driver
// Copyright (C) 2020 Texas Instruments Incorporated - https://www.ti.com/
#include <linux/module.h>
#include <linux/moduleparam.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/pm.h>
#include <linux/i2c.h>
#include <linux/gpio/consumer.h>
#include <linux/regulator/consumer.h>
#include <linux/acpi.h>
#include <linux/of.h>
#include <linux/of_gpio.h>
#include <linux/slab.h>
#include <sound/core.h>
#include <sound/pcm.h>
#include <sound/pcm_params.h>
#include <sound/soc.h>
#include <sound/initval.h>
#include <sound/tlv.h>
#include "tlv320adcx140.h"
struct adcx140_priv {
struct snd_soc_component *component;
struct regulator *supply_areg;
struct gpio_desc *gpio_reset;
struct regmap *regmap;
struct device *dev;
bool micbias_vg;
unsigned int dai_fmt;
unsigned int tdm_delay;
unsigned int slot_width;
};
static const char * const gpo_config_names[] = {
"ti,gpo-config-1",
"ti,gpo-config-2",
"ti,gpo-config-3",
"ti,gpo-config-4",
};
static const struct reg_default adcx140_reg_defaults[] = {
{ ADCX140_PAGE_SELECT, 0x00 },
{ ADCX140_SW_RESET, 0x00 },
{ ADCX140_SLEEP_CFG, 0x00 },
{ ADCX140_SHDN_CFG, 0x05 },
{ ADCX140_ASI_CFG0, 0x30 },
{ ADCX140_ASI_CFG1, 0x00 },
{ ADCX140_ASI_CFG2, 0x00 },
{ ADCX140_ASI_CH1, 0x00 },
{ ADCX140_ASI_CH2, 0x01 },
{ ADCX140_ASI_CH3, 0x02 },
{ ADCX140_ASI_CH4, 0x03 },
{ ADCX140_ASI_CH5, 0x04 },
{ ADCX140_ASI_CH6, 0x05 },
{ ADCX140_ASI_CH7, 0x06 },
{ ADCX140_ASI_CH8, 0x07 },
{ ADCX140_MST_CFG0, 0x02 },
{ ADCX140_MST_CFG1, 0x48 },
{ ADCX140_ASI_STS, 0xff },
{ ADCX140_CLK_SRC, 0x10 },
{ ADCX140_PDMCLK_CFG, 0x40 },
{ ADCX140_PDM_CFG, 0x00 },
{ ADCX140_GPIO_CFG0, 0x22 },
{ ADCX140_GPO_CFG0, 0x00 },
{ ADCX140_GPO_CFG1, 0x00 },
{ ADCX140_GPO_CFG2, 0x00 },
{ ADCX140_GPO_CFG3, 0x00 },
{ ADCX140_GPO_VAL, 0x00 },
{ ADCX140_GPIO_MON, 0x00 },
{ ADCX140_GPI_CFG0, 0x00 },
{ ADCX140_GPI_CFG1, 0x00 },
{ ADCX140_GPI_MON, 0x00 },
{ ADCX140_INT_CFG, 0x00 },
{ ADCX140_INT_MASK0, 0xff },
{ ADCX140_INT_LTCH0, 0x00 },
{ ADCX140_BIAS_CFG, 0x00 },
{ ADCX140_CH1_CFG0, 0x00 },
{ ADCX140_CH1_CFG1, 0x00 },
{ ADCX140_CH1_CFG2, 0xc9 },
{ ADCX140_CH1_CFG3, 0x80 },
{ ADCX140_CH1_CFG4, 0x00 },
{ ADCX140_CH2_CFG0, 0x00 },
{ ADCX140_CH2_CFG1, 0x00 },
{ ADCX140_CH2_CFG2, 0xc9 },
{ ADCX140_CH2_CFG3, 0x80 },
{ ADCX140_CH2_CFG4, 0x00 },
{ ADCX140_CH3_CFG0, 0x00 },
{ ADCX140_CH3_CFG1, 0x00 },
{ ADCX140_CH3_CFG2, 0xc9 },
{ ADCX140_CH3_CFG3, 0x80 },
{ ADCX140_CH3_CFG4, 0x00 },