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/* $Id: newport.h,v 1.5 1999/08/04 06:01:51 ulfc Exp $
*
* newport.h: Defines and register layout for NEWPORT graphics
* hardware.
*
* Copyright (C) 1996 David S. Miller (dm@engr.sgi.com)
*
* Ulf Carlsson - Compability with the IRIX structures added
*/
#ifndef _SGI_NEWPORT_H
#define _SGI_NEWPORT_H
typedef volatile unsigned int npireg_t;
union npfloat {
volatile float flt;
npireg_t word;
};
typedef union npfloat npfreg_t;
union np_dcb {
npireg_t byword;
struct { volatile unsigned short s0, s1; } byshort;
struct { volatile unsigned char b0, b1, b2, b3; } bybytes;
};
struct newport_rexregs {
npireg_t drawmode1; /* GL extra mode bits */
#define DM1_PLANES 0x00000007
#define DM1_NOPLANES 0x00000000
#define DM1_RGBPLANES 0x00000001
#define DM1_RGBAPLANES 0x00000002
#define DM1_OLAYPLANES 0x00000004
#define DM1_PUPPLANES 0x00000005
#define DM1_CIDPLANES 0x00000006
#define NPORT_DMODE1_DDMASK 0x00000018
#define NPORT_DMODE1_DD4 0x00000000
#define NPORT_DMODE1_DD8 0x00000008
#define NPORT_DMODE1_DD12 0x00000010
#define NPORT_DMODE1_DD24 0x00000018
#define NPORT_DMODE1_DSRC 0x00000020
#define NPORT_DMODE1_YFLIP 0x00000040
#define NPORT_DMODE1_RWPCKD 0x00000080
#define NPORT_DMODE1_HDMASK 0x00000300
#define NPORT_DMODE1_HD4 0x00000000
#define NPORT_DMODE1_HD8 0x00000100
#define NPORT_DMODE1_HD12 0x00000200
#define NPORT_DMODE1_HD32 0x00000300
#define NPORT_DMODE1_RWDBL 0x00000400
#define NPORT_DMODE1_ESWAP 0x00000800 /* Endian swap */
#define NPORT_DMODE1_CCMASK 0x00007000
#define NPORT_DMODE1_CCLT 0x00001000
#define NPORT_DMODE1_CCEQ 0x00002000
#define NPORT_DMODE1_CCGT 0x00004000
#define NPORT_DMODE1_RGBMD 0x00008000
#define NPORT_DMODE1_DENAB 0x00010000 /* Dither enable */
#define NPORT_DMODE1_FCLR 0x00020000 /* Fast clear */
#define NPORT_DMODE1_BENAB 0x00040000 /* Blend enable */
#define NPORT_DMODE1_SFMASK 0x00380000
#define NPORT_DMODE1_SF0 0x00000000
#define NPORT_DMODE1_SF1 0x00080000
#define NPORT_DMODE1_SFDC 0x00100000
#define NPORT_DMODE1_SFMDC 0x00180000
#define NPORT_DMODE1_SFSA 0x00200000
#define NPORT_DMODE1_SFMSA 0x00280000
#define NPORT_DMODE1_DFMASK 0x01c00000
#define NPORT_DMODE1_DF0 0x00000000
#define NPORT_DMODE1_DF1 0x00400000
#define NPORT_DMODE1_DFSC 0x00800000
#define NPORT_DMODE1_DFMSC 0x00c00000
#define NPORT_DMODE1_DFSA 0x01000000
#define NPORT_DMODE1_DFMSA 0x01400000
#define NPORT_DMODE1_BBENAB 0x02000000 /* Back blend enable */
#define NPORT_DMODE1_PFENAB 0x04000000 /* Pre-fetch enable */
#define NPORT_DMODE1_ABLEND 0x08000000 /* Alpha blend */
#define NPORT_DMODE1_LOMASK 0xf0000000
#define NPORT_DMODE1_LOZERO 0x00000000
#define NPORT_DMODE1_LOAND 0x10000000
#define NPORT_DMODE1_LOANDR 0x20000000
#define NPORT_DMODE1_LOSRC 0x30000000
#define NPORT_DMODE1_LOANDI 0x40000000
#define NPORT_DMODE1_LODST 0x50000000
#define NPORT_DMODE1_LOXOR 0x60000000
#define NPORT_DMODE1_LOOR 0x70000000
#define NPORT_DMODE1_LONOR 0x80000000
#define NPORT_DMODE1_LOXNOR 0x90000000
#define NPORT_DMODE1_LONDST 0xa0000000
#define NPORT_DMODE1_LOORR 0xb0000000
#define NPORT_DMODE1_LONSRC 0xc0000000
#define NPORT_DMODE1_LOORI 0xd0000000
#define NPORT_DMODE1_LONAND 0xe0000000
#define NPORT_DMODE1_LOONE 0xf0000000
npireg_t drawmode0; /* REX command register */
/* These bits define the graphics opcode being performed. */
#define NPORT_DMODE0_OPMASK 0x00000003 /* Opcode mask */
#define NPORT_DMODE0_NOP 0x00000000 /* No operation */
#define NPORT_DMODE0_RD 0x00000001 /* Read operation */
#define NPORT_DMODE0_DRAW 0x00000002 /* Draw operation */
#define NPORT_DMODE0_S2S 0x00000003 /* Screen to screen operation */
/* The following decide what addressing mode(s) are to be used */
#define NPORT_DMODE0_AMMASK 0x0000001c /* Address mode mask */
#define NPORT_DMODE0_SPAN 0x00000000 /* Spanning address mode */
#define NPORT_DMODE0_BLOCK 0x00000004 /* Block address mode */
#define NPORT_DMODE0_ILINE 0x00000008 /* Iline address mode */
#define NPORT_DMODE0_FLINE 0x0000000c /* Fline address mode */
#define NPORT_DMODE0_ALINE 0x00000010 /* Aline address mode */
#define NPORT_DMODE0_TLINE 0x00000014 /* Tline address mode */
#define NPORT_DMODE0_BLINE 0x00000018 /* Bline address mode */
/* And now some misc. operation control bits. */
#define NPORT_DMODE0_DOSETUP 0x00000020
#define NPORT_DMODE0_CHOST 0x00000040
#define NPORT_DMODE0_AHOST 0x00000080
#define NPORT_DMODE0_STOPX 0x00000100
#define NPORT_DMODE0_STOPY 0x00000200
#define NPORT_DMODE0_SK1ST 0x00000400
#define NPORT_DMODE0_SKLST 0x00000800
#define NPORT_DMODE0_ZPENAB 0x00001000
#define NPORT_DMODE0_LISPENAB 0x00002000
#define NPORT_DMODE0_LISLST 0x00004000
#define NPORT_DMODE0_L32 0x00008000
#define NPORT_DMODE0_ZOPQ 0x00010000
#define NPORT_DMODE0_LISOPQ 0x00020000
#define NPORT_DMODE0_SHADE 0x00040000
#define NPORT_DMODE0_LRONLY 0x00080000
#define NPORT_DMODE0_XYOFF 0x00100000
#define NPORT_DMODE0_CLAMP 0x00200000
#define NPORT_DMODE0_ENDPF 0x00400000
#define NPORT_DMODE0_YSTR 0x00800000
npireg_t lsmode; /* Mode for line stipple ops */
npireg_t lspattern; /* Pattern for line stipple ops */
npireg_t lspatsave; /* Backup save pattern */
npireg_t zpattern; /* Pixel zpattern */
npireg_t colorback; /* Background color */
npireg_t colorvram; /* Clear color for fast vram */
npireg_t alpharef; /* Reference value for afunctions */
unsigned int pad0;
npireg_t smask0x; /* Window GL relative screen mask 0 */
npireg_t smask0y; /* Window GL relative screen mask 0 */
npireg_t _setup;
npireg_t _stepz;
npireg_t _lsrestore;
npireg_t _lssave;
unsigned int _pad1[0x30];
/* Iterators, full state for context switch */
npfreg_t _xstart; /* X-start point (current) */
npfreg_t _ystart; /* Y-start point (current) */
npfreg_t _xend; /* x-end point */
npfreg_t _yend; /* y-end point */
npireg_t xsave; /* copy of xstart integer value for BLOCk addressing MODE */
npireg_t xymove; /* x.y offset from xstart, ystart for relative operations */
npfreg_t bresd;
npfreg_t bress1;
npireg_t bresoctinc1;
volatile int bresrndinc2;
npireg_t brese1;
npireg_t bress2;
npireg_t aweight0;
npireg_t aweight1;
npfreg_t xstartf;
npfreg_t ystartf;
npfreg_t xendf;
npfreg_t yendf;
npireg_t xstarti;
npfreg_t xendf1;
npireg_t xystarti;
npireg_t xyendi;
npireg_t xstartendi;
unsigned int _unused2[0x29];
npfreg_t colorred;
npfreg_t coloralpha;
npfreg_t colorgrn;
npfreg_t colorblue;
npfreg_t slopered;
npfreg_t slopealpha;
npfreg_t slopegrn;
npfreg_t slopeblue;
npireg_t wrmask;
npireg_t colori;
npfreg_t colorx;
npfreg_t slopered1;
npireg_t hostrw0;
npireg_t hostrw1;
npireg_t dcbmode;
#define NPORT_DMODE_WMASK 0x00000003
#define NPORT_DMODE_W4 0x00000000
#define NPORT_DMODE_W1 0x00000001
#define NPORT_DMODE_W2 0x00000002
#define NPORT_DMODE_W3 0x00000003
#define NPORT_DMODE_EDPACK 0x00000004
#define NPORT_DMODE_ECINC 0x00000008
#define NPORT_DMODE_CMASK 0x00000070
#define NPORT_DMODE_AMASK 0x00000780
#define NPORT_DMODE_AVC2 0x00000000
#define NPORT_DMODE_ACMALL 0x00000080
#define NPORT_DMODE_ACM0 0x00000100
#define NPORT_DMODE_ACM1 0x00000180
#define NPORT_DMODE_AXMALL 0x00000200
#define NPORT_DMODE_AXM0 0x00000280
#define NPORT_DMODE_AXM1 0x00000300
#define NPORT_DMODE_ABT 0x00000380
#define NPORT_DMODE_AVCC1 0x00000400
#define NPORT_DMODE_AVAB1 0x00000480
#define NPORT_DMODE_ALG3V0 0x00000500
#define NPORT_DMODE_A1562 0x00000580
#define NPORT_DMODE_ESACK 0x00000800
#define NPORT_DMODE_EASACK 0x00001000
#define NPORT_DMODE_CWMASK 0x0003e000
#define NPORT_DMODE_CHMASK 0x007c0000
#define NPORT_DMODE_CSMASK 0x0f800000
#define NPORT_DMODE_SENDIAN 0x10000000
unsigned int _unused3;
union np_dcb dcbdata0;
npireg_t dcbdata1;
};
struct newport_cregs {
npireg_t smask1x;
npireg_t smask1y;
npireg_t smask2x;
npireg_t smask2y;
npireg_t smask3x;
npireg_t smask3y;
npireg_t smask4x;
npireg_t smask4y;
npireg_t topscan;
npireg_t xywin;
npireg_t clipmode;
#define NPORT_CMODE_SM0 0x00000001
#define NPORT_CMODE_SM1 0x00000002
#define NPORT_CMODE_SM2 0x00000004
#define NPORT_CMODE_SM3 0x00000008
#define NPORT_CMODE_SM4 0x00000010
#define NPORT_CMODE_CMSK 0x00001e00
unsigned int _unused0;
unsigned int config;
#define NPORT_CFG_G32MD 0x00000001
#define NPORT_CFG_BWIDTH 0x00000002
#define NPORT_CFG_ERCVR 0x00000004
#define NPORT_CFG_BDMSK 0x00000078
#define NPORT_CFG_BFAINT 0x00000080
#define NPORT_CFG_GDMSK 0x00001f80
#define NPORT_CFG_GD0 0x00000100
#define NPORT_CFG_GD1 0x00000200
#define NPORT_CFG_GD2 0x00000400
#define NPORT_CFG_GD3 0x00000800
#define NPORT_CFG_GD4 0x00001000
#define NPORT_CFG_GFAINT 0x00002000
#define NPORT_CFG_TOMSK 0x0001c000
#define NPORT_CFG_VRMSK 0x000e0000
#define NPORT_CFG_FBTYP 0x00100000
npireg_t _unused1;
npireg_t status;
#define NPORT_STAT_VERS 0x00000007
#define NPORT_STAT_GBUSY 0x00000008
#define NPORT_STAT_BBUSY 0x00000010
#define NPORT_STAT_VRINT 0x00000020
#define NPORT_STAT_VIDINT 0x00000040
#define NPORT_STAT_GLMSK 0x00001f80
#define NPORT_STAT_BLMSK 0x0007e000
#define NPORT_STAT_BFIRQ 0x00080000
#define NPORT_STAT_GFIRQ 0x00100000
npireg_t ustatus;
npireg_t dcbreset;
};
struct newport_regs {
struct newport_rexregs set;
unsigned int _unused0[0x16e];
struct newport_rexregs go;
unsigned int _unused1[0x22e];
struct newport_cregs cset;
unsigned int _unused2[0x1ef];
struct newport_cregs cgo;
};
typedef struct {
unsigned int drawmode1;
unsigned int drawmode0;
unsigned int lsmode;
unsigned int lspattern;
unsigned int lspatsave;
unsigned int zpattern;
unsigned int colorback;
unsigned int colorvram;
unsigned int alpharef;
unsigned int smask0x;
unsigned int smask0y;
unsigned int _xstart;
unsigned int _ystart;
unsigned int _xend;
unsigned int _yend;
unsigned int xsave;
unsigned int xymove;
unsigned int bresd;
unsigned int bress1;
unsigned int bresoctinc1;
unsigned int bresrndinc2;
unsigned int brese1;
unsigned int bress2;
unsigned int aweight0;
unsigned int aweight1;
unsigned int colorred;
unsigned int coloralpha;
unsigned int colorgrn;
unsigned int colorblue;
unsigned int slopered;
unsigned int slopealpha;
unsigned int slopegrn;
unsigned int slopeblue;
unsigned int wrmask;
unsigned int hostrw0;
unsigned int hostrw1;
/* configregs */
unsigned int smask1x;
unsigned int smask1y;
unsigned int smask2x;
unsigned int smask2y;
unsigned int smask3x
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