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|
/* SPDX-License-Identifier: GPL-2.0+ */
/*
* Copyright (C) 2016 Freescale Semiconductor, Inc.
* Copyright 2017~2018 NXP
*/
#ifndef _IMX8QM_PADS_H
#define _IMX8QM_PADS_H
/* pin id */
#define IMX8QM_SIM0_CLK 0
#define IMX8QM_SIM0_RST 1
#define IMX8QM_SIM0_IO 2
#define IMX8QM_SIM0_PD 3
#define IMX8QM_SIM0_POWER_EN 4
#define IMX8QM_SIM0_GPIO0_00 5
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SIM 6
#define IMX8QM_M40_I2C0_SCL 7
#define IMX8QM_M40_I2C0_SDA 8
#define IMX8QM_M40_GPIO0_00 9
#define IMX8QM_M40_GPIO0_01 10
#define IMX8QM_M41_I2C0_SCL 11
#define IMX8QM_M41_I2C0_SDA 12
#define IMX8QM_M41_GPIO0_00 13
#define IMX8QM_M41_GPIO0_01 14
#define IMX8QM_GPT0_CLK 15
#define IMX8QM_GPT0_CAPTURE 16
#define IMX8QM_GPT0_COMPARE 17
#define IMX8QM_GPT1_CLK 18
#define IMX8QM_GPT1_CAPTURE 19
#define IMX8QM_GPT1_COMPARE 20
#define IMX8QM_UART0_RX 21
#define IMX8QM_UART0_TX 22
#define IMX8QM_UART0_RTS_B 23
#define IMX8QM_UART0_CTS_B 24
#define IMX8QM_UART1_TX 25
#define IMX8QM_UART1_RX 26
#define IMX8QM_UART1_RTS_B 27
#define IMX8QM_UART1_CTS_B 28
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLH 29
#define IMX8QM_SCU_PMIC_MEMC_ON 30
#define IMX8QM_SCU_WDOG_OUT 31
#define IMX8QM_PMIC_I2C_SDA 32
#define IMX8QM_PMIC_I2C_SCL 33
#define IMX8QM_PMIC_EARLY_WARNING 34
#define IMX8QM_PMIC_INT_B 35
#define IMX8QM_SCU_GPIO0_00 36
#define IMX8QM_SCU_GPIO0_01 37
#define IMX8QM_SCU_GPIO0_02 38
#define IMX8QM_SCU_GPIO0_03 39
#define IMX8QM_SCU_GPIO0_04 40
#define IMX8QM_SCU_GPIO0_05 41
#define IMX8QM_SCU_GPIO0_06 42
#define IMX8QM_SCU_GPIO0_07 43
#define IMX8QM_SCU_BOOT_MODE0 44
#define IMX8QM_SCU_BOOT_MODE1 45
#define IMX8QM_SCU_BOOT_MODE2 46
#define IMX8QM_SCU_BOOT_MODE3 47
#define IMX8QM_SCU_BOOT_MODE4 48
#define IMX8QM_SCU_BOOT_MODE5 49
#define IMX8QM_LVDS0_GPIO00 50
#define IMX8QM_LVDS0_GPIO01 51
#define IMX8QM_LVDS0_I2C0_SCL 52
#define IMX8QM_LVDS0_I2C0_SDA 53
#define IMX8QM_LVDS0_I2C1_SCL 54
#define IMX8QM_LVDS0_I2C1_SDA 55
#define IMX8QM_LVDS1_GPIO00 56
#define IMX8QM_LVDS1_GPIO01 57
#define IMX8QM_LVDS1_I2C0_SCL 58
#define IMX8QM_LVDS1_I2C0_SDA 59
#define IMX8QM_LVDS1_I2C1_SCL 60
#define IMX8QM_LVDS1_I2C1_SDA 61
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_LVDSGPIO 62
#define IMX8QM_MIPI_DSI0_I2C0_SCL 63
#define IMX8QM_MIPI_DSI0_I2C0_SDA 64
#define IMX8QM_MIPI_DSI0_GPIO0_00 65
#define IMX8QM_MIPI_DSI0_GPIO0_01 66
#define IMX8QM_MIPI_DSI1_I2C0_SCL 67
#define IMX8QM_MIPI_DSI1_I2C0_SDA 68
#define IMX8QM_MIPI_DSI1_GPIO0_00 69
#define IMX8QM_MIPI_DSI1_GPIO0_01 70
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_MIPIDSIGPIO 71
#define IMX8QM_MIPI_CSI0_MCLK_OUT 72
#define IMX8QM_MIPI_CSI0_I2C0_SCL 73
#define IMX8QM_MIPI_CSI0_I2C0_SDA 74
#define IMX8QM_MIPI_CSI0_GPIO0_00 75
#define IMX8QM_MIPI_CSI0_GPIO0_01 76
#define IMX8QM_MIPI_CSI1_MCLK_OUT 77
#define IMX8QM_MIPI_CSI1_GPIO0_00 78
#define IMX8QM_MIPI_CSI1_GPIO0_01 79
#define IMX8QM_MIPI_CSI1_I2C0_SCL 80
#define IMX8QM_MIPI_CSI1_I2C0_SDA 81
#define IMX8QM_HDMI_TX0_TS_SCL 82
#define IMX8QM_HDMI_TX0_TS_SDA 83
#define IMX8QM_COMP_CTL_GPIO_3V3_HDMIGPIO 84
#define IMX8QM_ESAI1_FSR 85
#define IMX8QM_ESAI1_FST 86
#define IMX8QM_ESAI1_SCKR 87
#define IMX8QM_ESAI1_SCKT 88
#define IMX8QM_ESAI1_TX0 89
#define IMX8QM_ESAI1_TX1 90
#define IMX8QM_ESAI1_TX2_RX3 91
#define IMX8QM_ESAI1_TX3_RX2 92
#define IMX8QM_ESAI1_TX4_RX1 93
#define IMX8QM_ESAI1_TX5_RX0 94
#define IMX8QM_SPDIF0_RX 95
#define IMX8QM_SPDIF0_TX 96
#define IMX8QM_SPDIF0_EXT_CLK 97
#define IMX8QM_SPI3_SCK 98
#define IMX8QM_SPI3_SDO 99
#define IMX8QM_SPI3_SDI 100
#define IMX8QM_SPI3_CS0 101
#define IMX8QM_SPI3_CS1 102
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHB 103
#define IMX8QM_ESAI0_FSR 104
#define IMX8QM_ESAI0_FST 105
#define IMX8QM_ESAI0_SCKR 106
#define IMX8QM_ESAI0_SCKT 107
#define IMX8QM_ESAI0_TX0 108
#define IMX8QM_ESAI0_TX1 109
#define IMX8QM_ESAI0_TX2_RX3 110
#define IMX8QM_ESAI0_TX3_RX2 111
#define IMX8QM_ESAI0_TX4_RX1 112
#define IMX8QM_ESAI0_TX5_RX0 113
#define IMX8QM_MCLK_IN0 114
#define IMX8QM_MCLK_OUT0 115
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHC 116
#define IMX8QM_SPI0_SCK 117
#define IMX8QM_SPI0_SDO 118
#define IMX8QM_SPI0_SDI 119
#define IMX8QM_SPI0_CS0 120
#define IMX8QM_SPI0_CS1 121
#define IMX8QM_SPI2_SCK 122
#define IMX8QM_SPI2_SDO 123
#define IMX8QM_SPI2_SDI 124
#define IMX8QM_SPI2_CS0 125
#define IMX8QM_SPI2_CS1 126
#define IMX8QM_SAI1_RXC 127
#define IMX8QM_SAI1_RXD 128
#define IMX8QM_SAI1_RXFS 129
#define IMX8QM_SAI1_TXC 130
#define IMX8QM_SAI1_TXD 131
#define IMX8QM_SAI1_TXFS 132
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIORHT 133
#define IMX8QM_ADC_IN7 134
#define IMX8QM_ADC_IN6 135
#define IMX8QM_ADC_IN5 136
#define IMX8QM_ADC_IN4 137
#define IMX8QM_ADC_IN3 138
#define IMX8QM_ADC_IN2 139
#define IMX8QM_ADC_IN1 140
#define IMX8QM_ADC_IN0 141
#define IMX8QM_MLB_SIG 142
#define IMX8QM_MLB_CLK 143
#define IMX8QM_MLB_DATA 144
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOLHT 145
#define IMX8QM_FLEXCAN0_RX 146
#define IMX8QM_FLEXCAN0_TX 147
#define IMX8QM_FLEXCAN1_RX 148
#define IMX8QM_FLEXCAN1_TX 149
#define IMX8QM_FLEXCAN2_RX 150
#define IMX8QM_FLEXCAN2_TX 151
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOTHR 152
#define IMX8QM_USB_SS3_TC0 153
#define IMX8QM_USB_SS3_TC1 154
#define IMX8QM_USB_SS3_TC2 155
#define IMX8QM_USB_SS3_TC3 156
#define IMX8QM_COMP_CTL_GPIO_3V3_USB3IO 157
#define IMX8QM_USDHC1_RESET_B 158
#define IMX8QM_USDHC1_VSELECT 159
#define IMX8QM_USDHC2_RESET_B 160
#define IMX8QM_USDHC2_VSELECT 161
#define IMX8QM_USDHC2_WP 162
#define IMX8QM_USDHC2_CD_B 163
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSELSEP 164
#define IMX8QM_ENET0_MDIO 165
#define IMX8QM_ENET0_MDC 166
#define IMX8QM_ENET0_REFCLK_125M_25M 167
#define IMX8QM_ENET1_REFCLK_125M_25M 168
#define IMX8QM_ENET1_MDIO 169
#define IMX8QM_ENET1_MDC 170
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_GPIOCT 171
#define IMX8QM_QSPI1A_SS0_B 172
#define IMX8QM_QSPI1A_SS1_B 173
#define IMX8QM_QSPI1A_SCLK 174
#define IMX8QM_QSPI1A_DQS 175
#define IMX8QM_QSPI1A_DATA3 176
#define IMX8QM_QSPI1A_DATA2 177
#define IMX8QM_QSPI1A_DATA1 178
#define IMX8QM_QSPI1A_DATA0 179
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI1 180
#define IMX8QM_QSPI0A_DATA0 181
#define IMX8QM_QSPI0A_DATA1 182
#define IMX8QM_QSPI0A_DATA2 183
#define IMX8QM_QSPI0A_DATA3 184
#define IMX8QM_QSPI0A_DQS 185
#define IMX8QM_QSPI0A_SS0_B 186
#define IMX8QM_QSPI0A_SS1_B 187
#define IMX8QM_QSPI0A_SCLK 188
#define IMX8QM_QSPI0B_SCLK 189
#define IMX8QM_QSPI0B_DATA0 190
#define IMX8QM_QSPI0B_DATA1 191
#define IMX8QM_QSPI0B_DATA2 192
#define IMX8QM_QSPI0B_DATA3 193
#define IMX8QM_QSPI0B_DQS 194
#define IMX8QM_QSPI0B_SS0_B 195
#define IMX8QM_QSPI0B_SS1_B 196
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_QSPI0 197
#define IMX8QM_PCIE_CTRL0_CLKREQ_B 198
#define IMX8QM_PCIE_CTRL0_WAKE_B 199
#define IMX8QM_PCIE_CTRL0_PERST_B 200
#define IMX8QM_PCIE_CTRL1_CLKREQ_B 201
#define IMX8QM_PCIE_CTRL1_WAKE_B 202
#define IMX8QM_PCIE_CTRL1_PERST_B 203
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_PCIESEP 204
#define IMX8QM_USB_HSIC0_DATA 205
#define IMX8QM_USB_HSIC0_STROBE 206
#define IMX8QM_CALIBRATION_0_HSIC 207
#define IMX8QM_CALIBRATION_1_HSIC 208
#define IMX8QM_EMMC0_CLK 209
#define IMX8QM_EMMC0_CMD 210
#define IMX8QM_EMMC0_DATA0 211
#define IMX8QM_EMMC0_DATA1 212
#define IMX8QM_EMMC0_DATA2 213
#define IMX8QM_EMMC0_DATA3 214
#define IMX8QM_EMMC0_DATA4 215
#define IMX8QM_EMMC0_DATA5 216
#define IMX8QM_EMMC0_DATA6 217
#define IMX8QM_EMMC0_DATA7 218
#define IMX8QM_EMMC0_STROBE 219
#define IMX8QM_EMMC0_RESET_B 220
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_SD1FIX 221
#define IMX8QM_USDHC1_CLK 222
#define IMX8QM_USDHC1_CMD 223
#define IMX8QM_USDHC1_DATA0 224
#define IMX8QM_USDHC1_DATA1 225
#define IMX8QM_CTL_NAND_RE_P_N 226
#define IMX8QM_USDHC1_DATA2 227
#define IMX8QM_USDHC1_DATA3 228
#define IMX8QM_CTL_NAND_DQS_P_N 229
#define IMX8QM_USDHC1_DATA4 230
#define IMX8QM_USDHC1_DATA5 231
#define IMX8QM_USDHC1_DATA6 232
#define IMX8QM_USDHC1_DATA7 233
#define IMX8QM_USDHC1_STROBE 234
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL2 235
#define IMX8QM_USDHC2_CLK 236
#define IMX8QM_USDHC2_CMD 237
#define IMX8QM_USDHC2_DATA0 238
#define IMX8QM_USDHC2_DATA1 239
#define IMX8QM_USDHC2_DATA2 240
#define IMX8QM_USDHC2_DATA3 241
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_VSEL3 242
#define IMX8QM_ENET0_RGMII_TXC 243
#define IMX8QM_ENET0_RGMII_TX_CTL 244
#define IMX8QM_ENET0_RGMII_TXD0 245
#define IMX8QM_ENET0_RGMII_TXD1 246
#define IMX8QM_ENET0_RGMII_TXD2 247
#define IMX8QM_ENET0_RGMII_TXD3 248
#define IMX8QM_ENET0_RGMII_RXC 249
#define IMX8QM_ENET0_RGMII_RX_CTL 250
#define IMX8QM_ENET0_RGMII_RXD0 251
#define IMX8QM_ENET0_RGMII_RXD1 252
#define IMX8QM_ENET0_RGMII_RXD2 253
#define IMX8QM_ENET0_RGMII_RXD3 254
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETB 255
#define IMX8QM_ENET1_RGMII_TXC 256
#define IMX8QM_ENET1_RGMII_TX_CTL 257
#define IMX8QM_ENET1_RGMII_TXD0 258
#define IMX8QM_ENET1_RGMII_TXD1 259
#define IMX8QM_ENET1_RGMII_TXD2 260
#define IMX8QM_ENET1_RGMII_TXD3 261
#define IMX8QM_ENET1_RGMII_RXC 262
#define IMX8QM_ENET1_RGMII_RX_CTL 263
#define IMX8QM_ENET1_RGMII_RXD0 264
#define IMX8QM_ENET1_RGMII_RXD1 265
#define IMX8QM_ENET1_RGMII_RXD2 266
#define IMX8QM_ENET1_RGMII_RXD3 267
#define IMX8QM_COMP_CTL_GPIO_1V8_3V3_ENET_ENETA 268
/*
* format: <pin_id mux_mode>
*/
#define IMX8QM_SIM0_CLK_DMA_SIM0_CLK IMX8QM_SIM0_CLK 0
#define IMX8QM_SIM0_CLK_LSIO_GPIO0_IO00 IMX8QM_SIM0_CLK 3
#define IMX8QM_SIM0_RST_DMA_SIM0_RST IMX8QM_SIM0_RST 0
#define IMX8QM_SIM0_RST_LSIO_GPIO0_IO01 IMX8QM_SIM0_RST 3
#define IMX8QM_SIM0_IO_DMA_SIM0_IO IMX8QM_SIM0_IO 0
#define IMX8QM_SIM0_IO_LSIO_GPIO0_IO02 IMX8QM_SIM0_IO 3
#define IMX8QM_SIM0_PD_DMA_SIM0_PD IMX8QM_SIM0_PD 0
#define IMX8QM_SIM0_PD_DMA_I2C3_SCL IMX8QM_SIM0_PD 1
#define IMX8QM_SIM0_PD_LSIO_GPIO0_IO03 IMX8QM_SIM0_PD 3
#define IMX8QM_SIM0_POWER_EN_DMA_SIM0_POWER_EN IMX8QM_SIM0_POWER_EN 0
#define IMX8QM_SIM0_POWER_EN_DMA_I2C3_SDA IMX8QM_SIM0_POWER_EN 1
#define IMX8QM_SIM0_POWER_EN_LSIO_GPIO0_IO04 IMX8QM_SIM0_POWER_EN 3
#define IMX8QM_SIM0_GPIO0_00_DMA_SIM0_POWER_EN IMX8QM_SIM0_GPIO0_00 0
#define IMX8QM_SIM0_GPIO0_00_LSIO_GPIO0_IO05 IMX8QM_SIM0_GPIO0_00 3
#define IMX8QM_M40_I2C0_SCL_M40_I2C0_SCL IMX8QM_M40_I2C0_SCL 0
#define IMX8QM_M40_I2C0_SCL_M40_UART0_RX IMX8QM_M40_I2C0_SCL 1
#define IMX8QM_M40_I2C0_SCL_M40_GPIO0_IO02 IMX8QM_M40_I2C0_SCL 2
#define IMX8QM_M40_I2C0_SCL_LSIO_GPIO0_IO06 IMX8QM_M40_I2C0_SCL 3
#define IMX8QM_M40_I2C0_SDA_M40_I2C0_SDA IMX8QM_M40_I2C0_SDA 0
#define IMX8QM_M40_I2C0_SDA_M40_UART0_TX IMX8QM_M40_I2C0_SDA 1
#define IMX8QM_M40_I2C0_SDA_M40_GPIO0_IO03 IMX8QM_M40_I2C0_SDA 2
#define IMX8QM_M40_I2C0_SDA_LSIO_GPIO0_IO07 IMX8QM_M40_I2C0_SDA 3
#define IMX8QM_M40_GPIO0_00_M40_GPIO0_IO00 IMX8QM_M40_GPIO0_00 0
#define IMX8QM_M40_GPIO0_00_M40_TPM0_CH0 IMX8QM_M40_GPIO0_00 1
#define IMX8QM_M40_GPIO0_00_DMA_UART4_RX IMX8QM_M40_GPIO0_00 2
#define IMX8QM_M40_GPIO0_00_LSIO_GPIO0_IO08 IMX8QM_M40_GPIO0_00 3
#define IMX8QM_M40_GPIO0_01_M40_GPIO0_IO01 IMX8QM_M40_GPIO0_01 0
#define IMX8QM_M40_GPIO0_01_M40_TPM0_CH1 IMX8QM_M40_GPIO0_01 1
#define IMX8QM_M40_GPIO0_01_DMA_UART4_TX IMX8QM_M40_GPIO0_01 2
#define IMX8QM_M40_GPIO0_01_LSIO_GPIO0_IO09 IMX8QM_M40_GPIO0_01 3
#define IMX8QM_M41_I2C0_SCL_M41_I2C0_SCL IMX8QM_M41_I2C0_SCL 0
#define IMX8QM_M41_I2C0_SCL_M41_UART0_RX IMX8QM_M41_I2C0_SCL 1
#define IMX8QM_M41_I2C0_SCL_M41_GPIO0_IO02 IMX8QM_M41_I2C0_SCL 2
#define IMX8QM_M41_I2C0_SCL_LSIO_GPIO0_IO10 IMX8QM_M41_I2C0_SCL 3
#define IMX8QM_M41_I2C0_SDA_M41_I2C0_SDA IMX8QM_M41_I2C0_SDA 0
#define IMX8QM_M41_I2C0_SDA_M41_UART0_TX IMX8QM_M41_I2C0_SDA 1
#define IMX8QM_M41_I2C0_SDA_M41_GPIO0_IO03 IMX8QM_M41_I2C0_SDA 2
#define IMX8QM_M41_I2C0_SDA_LSIO_GPIO0_IO11 IMX8QM_M41_I2C0_SDA 3
#define IMX8QM_M41_GPIO0_00_M41_GPIO0_IO00 IMX8QM_M41_GPIO0_00 0
#define IMX8QM_M41_GPIO0_00_M41_TPM0_CH0 IMX8QM_M41_GPIO0_00 1
#define IMX8QM_M41_GPIO0_00_DMA_UART3_RX IMX8QM_M41_GPIO0_00 2
#define IMX8QM_M41_GPIO0_00_LSIO_GPIO0_IO12 IMX8QM_M41_GPIO0_00 3
#define IMX8QM_M41_GPIO0_01_M41_GPIO0_IO01 IMX8QM_M41_GPIO0_01 0
#define IMX8QM_M41_GPIO0_01_M41_TPM0_CH1 IMX8QM_M41_GPIO0_01 1
#define IMX8QM_M41_GPIO0_01_DMA_UART3_TX IMX8QM_M41_GPIO0_01 2
#define IMX8QM_M41_GPIO0_01_LSIO_GPIO0_IO13 IMX8QM_M41_GPIO0_01 3
#define IMX8QM_GPT0_CLK_LSIO_GPT0_CLK IMX8QM_GPT0_CLK 0
#define IMX8QM_GPT0_CLK_DMA_I2C1_SCL IMX8QM_GPT0_CLK 1
#define IMX8QM_GPT0_CLK_LSIO_KPP0_COL4 IMX8QM_GPT0_CLK 2
#define IMX8QM_GPT0_CLK_LSIO_GPIO0_IO14 IMX8QM_GPT0_CLK 3
#define IMX8QM_GPT0_CAPTURE_LSIO_GPT0_CAPTURE IMX8QM_GPT0_CAPTURE 0
#define IMX8QM_GPT0_CAPTURE_DMA_I2C1_SDA IMX8QM_GPT0_CAPTURE 1
#define IMX8QM_GPT0_CAPTURE_LSIO_KPP0_COL5 IMX8QM_GPT0_CAPTURE 2
#define IMX8QM_GPT0_CAPTURE_LSIO_GPIO0_IO15 IMX8QM_GPT0_CAPTURE 3
#define IMX8QM_GPT0_COMPARE_LSIO_GPT0_COMPARE IMX8QM_GPT0_COMPARE 0
#define IMX8QM_GPT0_COMPARE_LSIO_PWM3_OUT IMX8QM_GPT0_COMPARE 1
#define IMX8QM_GPT0_COMPARE_LSIO_KPP0_COL6 IMX8QM_GPT0_COMPARE 2
#define IMX8QM_GPT0_COMPARE_LSIO_GPIO0_IO16 IMX8QM_GPT0_COMPARE 3
#define IMX8QM_GPT1_CLK_LSIO_GPT1_CLK IMX8QM_GPT1_CLK 0
#define IMX8QM_GPT1_CLK_DMA_I2C2_SCL IMX8QM_GPT1_CLK 1
#define IMX8QM_GPT1_CLK_LSIO_KPP0_COL7 IMX8QM_GPT1_CLK 2
#define IMX8QM_GPT1_CLK_LSIO_GPIO0_IO17 IMX8QM_GPT1_CLK 3
#define IMX8QM_GPT1_CAPTURE_LSIO_GPT1_CAPTURE IMX8QM_GPT1_CAPTURE 0
#define IMX8QM_GPT1_CAPTURE_DMA_I2C2_SDA IMX8QM_GPT1_CAPTURE 1
#define IMX8QM_GPT1_CAPTURE_LSIO_KPP0_ROW4 IMX8QM_GPT1_CAPTURE 2
#define IMX8QM_GPT1_CAPTURE_LSIO_GPIO0_IO18 IMX8QM_GPT1_CAPTURE 3
#define IMX8QM_GPT1_COMPARE_LSIO_GPT1_COMPARE IMX8QM_GPT1_COMPARE 0
#define IMX8QM_GPT1_COMPARE_LSIO_PWM2_OUT IMX8QM_GPT1_COMPARE 1
#define IMX8QM_GPT1_COMPARE_LSIO_KPP0_ROW5 IMX8QM_GPT1_COMPARE 2
#define IMX8QM_GPT1_COMPARE_LSIO_GPIO0_IO19 IMX8QM_GPT1_COMPARE 3
#define IMX8QM_UART0_RX_DMA_UART0_RX IMX8QM_UART0_RX 0
#define IMX8QM_UART0_RX_SCU_UART0_RX IMX8QM_UART0_RX 1
#define IMX8QM_UART0_RX_LSIO_GPIO0_IO20 IMX8QM_UART0_RX 3
#define IMX8QM_UART0_TX_DMA_UART0_TX IMX8QM_UART0_TX 0
#define IMX8QM_UART0_TX_SCU_UART0_TX IMX8QM_UART0_TX 1
#define IMX8QM_UART0_TX_LSIO_GPIO0_IO21 IMX8QM_UART0_TX 3
#define IMX8QM_UART0_RTS_B_DMA_UART0_RTS_B IMX8QM_UART0_RTS_B 0
#define IMX8QM_UART0_RTS_B_LSIO_PWM0_OUT IMX8QM_UART0_RTS_B 1
#define IMX8QM_UART0_RTS_B_DMA_UART2_RX IMX8QM_UART0_RTS_B 2
#define IMX8QM_UART0_RTS_B_LSIO_GPIO0_IO22 IMX8QM_UART0_RTS_B 3
#define IMX8QM_UART0_CTS_B_DMA_UART0_CTS_B IMX8QM_UART0_CTS_B 0
#define IMX8QM_UART0_CTS_B_LSIO_PWM1_OUT IMX8QM_UART0_CTS_B 1
#define IMX8QM_UART0_CTS_B_DMA_UART2_TX IMX8QM_UART0_CTS_B 2
#define IMX8QM_UART0_CTS_B_LSIO_GPIO0_IO23 IMX8QM_UART0_CTS_B 3
#define IMX8QM_UART1_TX_DMA_UART1_TX IMX8QM_UART1_TX 0
#define IMX8QM_UART1_TX_DMA_SPI3_SCK IMX8QM_UART1_TX 1
#define IMX8QM_UART1_TX_LSIO_GPIO0_IO24 IMX8QM_UART1_TX 3
#define IMX8QM_UART1_RX_DMA_UART1_RX IMX8QM_UART1_RX 0
#define IMX8QM_UART1_RX_DMA_SPI3_SDO IMX8QM_UART1_RX 1
#define IMX8QM_UART1_RX_LSIO_GPIO0_IO25 IMX8QM_UART1_RX 3
#define IMX8QM_UART1_RTS_B_DMA_UART1_RTS_B
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