1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
750
751
752
753
754
755
756
757
758
759
760
761
762
763
764
765
766
767
768
769
770
771
772
773
774
775
776
777
778
779
780
781
|
#ifndef _PARISC_PDC_H
#define _PARISC_PDC_H
#include <linux/config.h>
/*
* PDC return values ...
* All PDC calls return a subset of these errors.
*/
#define PDC_WARN 3 /* Call completed with a warning */
#define PDC_REQ_ERR_1 2 /* See above */
#define PDC_REQ_ERR_0 1 /* Call would generate a requestor error */
#define PDC_OK 0 /* Call completed successfully */
#define PDC_BAD_PROC -1 /* Called non-existent procedure*/
#define PDC_BAD_OPTION -2 /* Called with non-existent option */
#define PDC_ERROR -3 /* Call could not complete without an error */
#define PDC_NE_MOD -5 /* Module not found */
#define PDC_NE_CELL_MOD -7 /* Cell module not found */
#define PDC_INVALID_ARG -10 /* Called with an invalid argument */
#define PDC_BUS_POW_WARN -12 /* Call could not complete in allowed power budget */
#define PDC_NOT_NARROW -17 /* Narrow mode not supported */
/*
* PDC entry points...
*/
#define PDC_POW_FAIL 1 /* perform a power-fail */
#define PDC_POW_FAIL_PREPARE 0 /* prepare for powerfail */
#define PDC_CHASSIS 2 /* PDC-chassis functions */
#define PDC_CHASSIS_DISP 0 /* update chassis display */
#define PDC_CHASSIS_WARN 1 /* return chassis warnings */
#define PDC_CHASSIS_DISPWARN 2 /* update&return chassis status */
#define PDC_RETURN_CHASSIS_INFO 128 /* HVERSION dependent: return chassis LED/LCD info */
#define PDC_PIM 3 /* Get PIM data */
#define PDC_PIM_HPMC 0 /* Transfer HPMC data */
#define PDC_PIM_RETURN_SIZE 1 /* Get Max buffer needed for PIM*/
#define PDC_PIM_LPMC 2 /* Transfer HPMC data */
#define PDC_PIM_SOFT_BOOT 3 /* Transfer Soft Boot data */
#define PDC_PIM_TOC 4 /* Transfer TOC data */
#define PDC_MODEL 4 /* PDC model information call */
#define PDC_MODEL_INFO 0 /* returns information */
#define PDC_MODEL_BOOTID 1 /* set the BOOT_ID */
#define PDC_MODEL_VERSIONS 2 /* returns cpu-internal versions*/
#define PDC_MODEL_SYSMODEL 3 /* return system model info */
#define PDC_MODEL_ENSPEC 4 /* enable specific option */
#define PDC_MODEL_DISPEC 5 /* disable specific option */
#define PDC_MODEL_CPU_ID 6 /* returns cpu-id (only newer machines!) */
#define PDC_MODEL_CAPABILITIES 7 /* returns OS32/OS64-flags */
#define PDC_MODEL_GET_BOOT__OP 8 /* returns boot test options */
#define PDC_MODEL_SET_BOOT__OP 9 /* set boot test options */
#define PA89_INSTRUCTION_SET 0x4 /* capatibilies returned */
#define PA90_INSTRUCTION_SET 0x8
#define PDC_CACHE 5 /* return/set cache (& TLB) info*/
#define PDC_CACHE_INFO 0 /* returns information */
#define PDC_CACHE_SET_COH 1 /* set coherence state */
#define PDC_CACHE_RET_SPID 2 /* returns space-ID bits */
#define PDC_HPA 6 /* return HPA of processor */
#define PDC_HPA_PROCESSOR 0
#define PDC_HPA_MODULES 1
#define PDC_COPROC 7 /* Co-Processor (usually FP unit(s)) */
#define PDC_COPROC_CFG 0 /* Co-Processor Cfg (FP unit(s) enabled?) */
#define PDC_IODC 8 /* talk to IODC */
#define PDC_IODC_READ 0 /* read IODC entry point */
/* PDC_IODC_RI_ * INDEX parameter of PDC_IODC_READ */
#define PDC_IODC_RI_DATA_BYTES 0 /* IODC Data Bytes */
/* 1, 2 obsolete - HVERSION dependent*/
#define PDC_IODC_RI_INIT 3 /* Initialize module */
#define PDC_IODC_RI_IO 4 /* Module input/output */
#define PDC_IODC_RI_SPA 5 /* Module input/output */
#define PDC_IODC_RI_CONFIG 6 /* Module input/output */
/* 7 obsolete - HVERSION dependent */
#define PDC_IODC_RI_TEST 8 /* Module input/output */
#define PDC_IODC_RI_TLB 9 /* Module input/output */
#define PDC_IODC_NINIT 2 /* non-destructive init */
#define PDC_IODC_DINIT 3 /* destructive init */
#define PDC_IODC_MEMERR 4 /* check for memory errors */
#define PDC_IODC_INDEX_DATA 0 /* get first 16 bytes from mod IODC */
#define PDC_IODC_BUS_ERROR -4 /* bus error return value */
#define PDC_IODC_INVALID_INDEX -5 /* invalid index return value */
#define PDC_IODC_COUNT -6 /* count is too small */
#define PDC_TOD 9 /* time-of-day clock (TOD) */
#define PDC_TOD_READ 0 /* read TOD */
#define PDC_TOD_WRITE 1 /* write TOD */
#define PDC_TOD_ITIMER 2 /* calibrate Interval Timer (CR16) */
#define PDC_STABLE 10 /* stable storage (sprockets) */
#define PDC_STABLE_READ 0
#define PDC_STABLE_WRITE 1
#define PDC_STABLE_RETURN_SIZE 2
#define PDC_STABLE_VERIFY_CONTENTS 3
#define PDC_STABLE_INITIALIZE 4
#define PDC_NVOLATILE 11 /* often not implemented */
#define PDC_ADD_VALID 12 /* Memory validation PDC call */
#define PDC_ADD_VALID_VERIFY 0 /* Make PDC_ADD_VALID verify region */
#define PDC_INSTR 15 /* get instr to invoke PDCE_CHECK() */
#define PDC_PROC 16 /* (sprockets) */
#define PDC_CONFIG 16 /* (sprockets) */
#define PDC_CONFIG_DECONFIG 0
#define PDC_CONFIG_DRECONFIG 1
#define PDC_CONFIG_DRETURN_CONFIG 2
#define PDC_BLOCK_TLB 18 /* manage hardware block-TLB */
#define PDC_BTLB_INFO 0 /* returns parameter */
#define PDC_BTLB_INSERT 1 /* insert BTLB entry */
#define PDC_BTLB_PURGE 2 /* purge BTLB entries */
#define PDC_BTLB_PURGE_ALL 3 /* purge all BTLB entries */
#define PDC_TLB 19 /* manage hardware TLB miss handling */
#define PDC_TLB_INFO 0 /* returns parameter */
#define PDC_TLB_SETUP 1 /* set up miss handling */
#define PDC_MEM 20 /* Manage memory */
#define PDC_MEM_MEMINFO 0
#define PDC_MEM_ADD_PAGE 1
#define PDC_MEM_CLEAR_PDT 2
#define PDC_MEM_READ_PDT 3
#define PDC_MEM_RESET_CLEAR 4
#define PDC_MEM_GOODMEM 5
#define PDC_MEM_TABLE 128 /* Non contig mem map (sprockets) */
#define PDC_MEM_RETURN_ADDRESS_TABLE PDC_MEM_TABLE
#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES_SIZE 131
#define PDC_MEM_GET_MEMORY_SYSTEM_TABLES 132
#define PDC_MEM_GET_PHYSICAL_LOCATION_FROM_MEMORY_ADDRESS 133
#define PDC_MEM_RET_SBE_REPLACED 5 /* PDC_MEM return values */
#define PDC_MEM_RET_DUPLICATE_ENTRY 4
#define PDC_MEM_RET_BUF_SIZE_SMALL 1
#define PDC_MEM_RET_PDT_FULL -11
#define PDC_MEM_RET_INVALID_PHYSICAL_LOCATION ~0ULL
#ifndef __ASSEMBLY__
typedef struct {
unsigned long long baseAddr;
unsigned int pages;
unsigned int reserved;
} MemAddrTable_t;
#endif
#define PDC_PSW 21 /* Get/Set default System Mask */
#define PDC_PSW_MASK 0 /* Return mask */
#define PDC_PSW_GET_DEFAULTS 1 /* Return defaults */
#define PDC_PSW_SET_DEFAULTS 2 /* Set default */
#define PDC_PSW_ENDIAN_BIT 1 /* set for big endian */
#define PDC_PSW_WIDE_BIT 2 /* set for wide mode */
#define PDC_SYSTEM_MAP 22 /* find system modules */
#define PDC_FIND_MODULE 0
#define PDC_FIND_ADDRESS 1
#define PDC_TRANSLATE_PATH 2
#define PDC_SOFT_POWER 23 /* soft power switch */
#define PDC_SOFT_POWER_INFO 0 /* return info about the soft power switch */
#define PDC_SOFT_POWER_ENABLE 1 /* enable/disable soft power switch */
/* HVERSION dependent */
/* The PDC_MEM_MAP calls */
#define PDC_MEM_MAP 128 /* on s700: return page info */
#define PDC_MEM_MAP_HPA 0 /* returns hpa of a module */
#define PDC_EEPROM 129 /* EEPROM access */
#define PDC_EEPROM_READ_WORD 0
#define PDC_EEPROM_WRITE_WORD 1
#define PDC_EEPROM_READ_BYTE 2
#define PDC_EEPROM_WRITE_BYTE 3
#define PDC_EEPROM_EEPROM_PASSWORD -1000
#define PDC_NVM 130 /* NVM (non-volatile memory) access */
#define PDC_NVM_READ_WORD 0
#define PDC_NVM_WRITE_WORD 1
#define PDC_NVM_READ_BYTE 2
#define PDC_NVM_WRITE_BYTE 3
#define PDC_SEED_ERROR 132 /* (sprockets) */
#define PDC_IO 135 /* log error info, reset IO system */
#define PDC_IO_READ_AND_CLEAR_ERRORS 0
#define PDC_IO_RESET 1
#define PDC_IO_RESET_DEVICES 2
/* sets bits 6&7 (little endian) of the HcControl Register */
#define PDC_IO_USB_SUSPEND 0xC000000000000000
#define PDC_IO_EEPROM_IO_ERR_TABLE_FULL -5 /* return value */
#define PDC_IO_NO_SUSPEND -6 /* return value */
#define PDC_BROADCAST_RESET 136 /* reset all processors */
#define PDC_DO_RESET 0 /* option: perform a broadcast reset */
#define PDC_DO_FIRM_TEST_RESET 1 /* Do broadcast reset with bitmap */
#define PDC_BR_RECONFIGURATION 2 /* reset w/reconfiguration */
#define PDC_FIRM_TEST_MAGIC 0xab9ec36fUL /* for this reboot only */
#define PDC_LAN_STATION_ID 138 /* Hversion dependent mechanism for */
#define PDC_LAN_STATION_ID_READ 0 /* getting the lan station address */
#define PDC_LAN_STATION_ID_SIZE 6
#define PDC_CHECK_RANGES 139 /* (sprockets) */
#define PDC_NV_SECTIONS 141 /* (sprockets) */
#define PDC_PERFORMANCE 142 /* performance monitoring */
#define PDC_SYSTEM_INFO 143 /* system information */
#define PDC_SYSINFO_RETURN_INFO_SIZE 0
#define PDC_SYSINFO_RRETURN_SYS_INFO 1
#define PDC_SYSINFO_RRETURN_ERRORS 2
#define PDC_SYSINFO_RRETURN_WARNINGS 3
#define PDC_SYSINFO_RETURN_REVISIONS 4
#define PDC_SYSINFO_RRETURN_DIAGNOSE 5
#define PDC_SYSINFO_RRETURN_HV_DIAGNOSE 1005
#define PDC_RDR 144 /* (sprockets) */
#define PDC_RDR_READ_BUFFER 0
#define PDC_RDR_READ_SINGLE 1
#define PDC_RDR_WRITE_SINGLE 2
#define PDC_INTRIGUE 145 /* (sprockets) */
#define PDC_INTRIGUE_WRITE_BUFFER 0
#define PDC_INTRIGUE_GET_SCRATCH_BUFSIZE 1
#define PDC_INTRIGUE_START_CPU_COUNTERS 2
#define PDC_INTRIGUE_STOP_CPU_COUNTERS 3
#define PDC_STI 146 /* STI access */
/* same as PDC_PCI_XXX values (see below) */
/* Legacy PDC definitions for same stuff */
#define PDC_PCI_INDEX 147
#define PDC_PCI_INTERFACE_INFO 0
#define PDC_PCI_SLOT_INFO 1
#define PDC_PCI_INFLIGHT_BYTES 2
#define PDC_PCI_READ_CONFIG 3
#define PDC_PCI_WRITE_CONFIG 4
#define PDC_PCI_READ_PCI_IO 5
#define PDC_PCI_WRITE_PCI_IO 6
#define PDC_PCI_READ_CONFIG_DELAY 7
#define PDC_PCI_UPDATE_CONFIG_DELAY 8
#define PDC_PCI_PCI_PATH_TO_PCI_HPA 9
#define PDC_PCI_PCI_HPA_TO_PCI_PATH 10
#define PDC_PCI_PCI_PATH_TO_PCI_BUS 11
#define PDC_PCI_PCI_RESERVED 12
#define PDC_PCI_PCI_INT_ROUTE_SIZE 13
#define PDC_PCI_GET_INT_TBL_SIZE PDC_PCI_PCI_INT_ROUTE_SIZE
#define PDC_PCI_PCI_INT_ROUTE 14
#define PDC_PCI_GET_INT_TBL PDC_PCI_PCI_INT_ROUTE
#define PDC_PCI_READ_MON_TYPE 15
#define PDC_PCI_WRITE_MON_TYPE 16
/* Get SCSI Interface Card info: SDTR, SCSI ID, mode (SE vs LVD) */
#define PDC_INITIATOR 163
#define PDC_GET_INITIATOR 0
#define PDC_SET_INITIATOR 1
#define PDC_DELETE_INITIATOR 2
#define PDC_RETURN_TABLE_SIZE 3
#define PDC_RETURN_TABLE 4
#define PDC_LINK 165 /* (sprockets) */
#define PDC_LINK_PCI_ENTRY_POINTS 0 /* list (Arg1) = 0 */
#define PDC_LINK_USB_ENTRY_POINTS 1 /* list (Arg1) = 1 */
/* constants for OS (NVM...) */
#define OS_ID_NONE 0 /* Undefined OS ID */
#define OS_ID_HPUX 1 /* HP-UX OS */
#define OS_ID_LINUX OS_ID_HPUX /* just use the same value as hpux */
#define OS_ID_MPEXL 2 /* MPE XL OS */
#define OS_ID_OSF 3 /* OSF OS */
#define OS_ID_HPRT 4 /* HP-RT OS */
#define OS_ID_NOVEL 5 /* NOVELL OS */
#define OS_ID_NT 6 /* NT OS */
/* constants for PDC_CHASSIS */
#define OSTAT_OFF 0
#define OSTAT_FLT 1
#define OSTAT_TEST 2
#define OSTAT_INIT 3
#define OSTAT_SHUT 4
#define OSTAT_WARN 5
#define OSTAT_RUN 6
#define OSTAT_ON 7
#ifndef __ASSEMBLY__
#include <linux/types.h>
extern int pdc_type;
/* Values for pdc_type */
#define PDC_TYPE_ILLEGAL -1
#define PDC_TYPE_PAT 0 /* 64-bit PAT-PDC */
#define PDC_TYPE_SYSTEM_MAP 1 /* 32-bit, but supports PDC_SYSTEM_MAP */
#define PDC_TYPE_SNAKE 2 /* Doesn't support SYSTEM_MAP */
struct pdc_chassis_info { /* for PDC_CHASSIS_INFO */
unsigned long actcnt; /* actual number of bytes returned */
unsigned long maxcnt; /* maximum number of bytes that could be returned */
};
struct pdc_coproc_cfg { /* for PDC_COPROC_CFG */
unsigned long ccr_functional;
unsigned long ccr_present;
unsigned long revision;
unsigned long model;
};
struct pdc_model { /* for PDC_MODEL */
unsigned long hversion;
unsigned long sversion;
unsigned long hw_id;
unsigned long boot_id;
unsigned long sw_id;
unsigned long sw_cap;
unsigned long arch_rev;
unsigned long pot_key;
unsigned long curr_key;
};
/* Values for PDC_MODEL_CAPABILITES non-equivalent virtual aliasing support */
#define PDC_MODEL_IOPDIR_FDC (1 << 2) /* see sba_iommu.c */
#define PDC_MODEL_NVA_MASK (3 << 4)
#define PDC_MODEL_NVA_SUPPORTED (0 << 4)
#define PDC_MODEL_NVA_SLOW (1 << 4)
#define PDC_MODEL_NVA_UNSUPPORTED (3 << 4)
struct pdc_cache_cf { /* for PDC_CACHE (I/D-caches) */
unsigned long
#ifdef __LP64__
cc_padW:32,
#endif
cc_alias: 4, /* alias boundaries for virtual addresses */
cc_block: 4, /* to determine most efficient stride */
cc_line : 3, /* maximum amount written back as a result of store (multiple of 16 bytes) */
cc_shift: 2, /* how much to shift cc_block left */
cc_wt : 1, /* 0 = WT-Dcache, 1 = WB-Dcache */
cc_sh : 2, /* 0 = separate I/D-cache, else shared I/D-cache */
cc_cst : 3, /* 0 = incoherent D-cache, 1=coherent D-cache */
cc_pad1 : 5, /* reserved */
cc_assoc: 8; /* associativity of I/D-cache */
};
struct pdc_tlb_cf { /* for PDC_CACHE (I/D-TLB's) */
unsigned long tc_pad0:12, /* reserved */
#ifdef __LP64__
tc_padW:32,
#endif
tc_sh : 2, /* 0 = separate I/D-TLB, else shared I/D-TLB */
tc_hv : 1, /* HV */
tc_page : 1, /* 0 = 2K page-size-machine, 1 = 4k page size */
tc_cst : 3, /* 0 = incoherent operations, else coherent operations */
tc_aid : 5,
|