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// SPDX-License-Identifier: GPL-2.0+
/*
* NS pc87413-wdt Watchdog Timer driver for Linux 2.6.x.x
*
* This code is based on wdt.c with original copyright.
*
* (C) Copyright 2006 Sven Anders, <anders@anduras.de>
* and Marcus Junker, <junker@anduras.de>
*
* Neither Sven Anders, Marcus Junker nor ANDURAS AG
* admit liability nor provide warranty for any of this software.
* This material is provided "AS-IS" and at no charge.
*
* Release 1.1
*/
#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
#include <linux/module.h>
#include <linux/types.h>
#include <linux/miscdevice.h>
#include <linux/watchdog.h>
#include <linux/ioport.h>
#include <linux/delay.h>
#include <linux/notifier.h>
#include <linux/fs.h>
#include <linux/reboot.h>
#include <linux/init.h>
#include <linux/spinlock.h>
#include <linux/moduleparam.h>
#include <linux/io.h>
#include <linux/uaccess.h>
/* #define DEBUG 1 */
#define DEFAULT_TIMEOUT 1 /* 1 minute */
#define MAX_TIMEOUT 255
#define VERSION "1.1"
#define MODNAME "pc87413 WDT"
#define DPFX MODNAME " - DEBUG: "
#define WDT_INDEX_IO_PORT (io+0) /* I/O port base (index register) */
#define WDT_DATA_IO_PORT (WDT_INDEX_IO_PORT+1)
#define SWC_LDN 0x04
#define SIOCFG2 0x22 /* Serial IO register */
#define WDCTL 0x10 /* Watchdog-Timer-Control-Register */
#define WDTO 0x11 /* Watchdog timeout register */
#define WDCFG 0x12 /* Watchdog config register */
#define IO_DEFAULT 0x2E /* Address used on Portwell Boards */
static int io = IO_DEFAULT;
static int swc_base_addr = -1;
static int timeout = DEFAULT_TIMEOUT; /* timeout value */
static unsigned long timer_enabled; /* is the timer enabled? */
static char expect_close; /* is the close expected? */
static DEFINE_SPINLOCK(io_lock); /* to guard us from io races */
static bool nowayout = WATCHDOG_NOWAYOUT;
/* -- Low level function ----------------------------------------*/
/* Select pins for Watchdog output */
static inline void pc87413_select_wdt_out(void)
{
unsigned int cr_data = 0;
/* Step 1: Select multiple pin,pin55,as WDT output */
outb_p(SIOCFG2, WDT_INDEX_IO_PORT);
cr_data = inb(WDT_DATA_IO_PORT);
cr_data |= 0x80; /* Set Bit7 to 1*/
outb_p(SIOCFG2, WDT_INDEX_IO_PORT);
outb_p(cr_data, WDT_DATA_IO_PORT);
#ifdef DEBUG
pr_info(DPFX
"Select multiple pin,pin55,as WDT output: Bit7 to 1: %d\n",
cr_data);
#endif
}
/* Enable SWC functions */
static inline void pc87413_enable_swc(void)
{
unsigned int cr_data = 0;
/* Step 2: Enable SWC functions */
outb_p(0x07, WDT_INDEX_IO_PORT); /* Point SWC_LDN (LDN=4) */
outb_p(SWC_LDN, WDT_DATA_IO_PORT);
outb_p(0x30, WDT_INDEX_IO_PORT); /* Read Index 0x30 First */
cr_data = inb(WDT_DATA_IO_PORT);
cr_data |= 0x01; /* Set Bit0 to 1 */
outb_p(0x30, WDT_INDEX_IO_PORT);
outb_p(cr_data, WDT_DATA_IO_PORT); /* Index0x30_bit0P1 */
#ifdef DEBUG
pr_info(DPFX "pc87413 - Enable SWC functions\n");
#endif
}
/* Read SWC I/O base address */
static void pc87413_get_swc_base_addr(void)
{
unsigned char addr_l, addr_h = 0;
/* Step 3: Read SWC I/O Base Address */
outb_p(0x60, WDT_INDEX_IO_PORT); /* Read Index 0x60 */
addr_h = inb(WDT_DATA_IO_PORT);
outb_p(0x61, WDT_INDEX_IO_PORT); /* Read Index 0x61 */
addr_l = inb(WDT_DATA_IO_PORT);
swc_base_addr = (addr_h << 8) + addr_l;
#ifdef DEBUG
pr_info(DPFX
"Read SWC I/O Base Address: low %d, high %d, res %d\n",
addr_l, addr_h, swc_base_addr);
#endif
}
/* Select Bank 3 of SWC */
static inline void pc87413_swc_bank3(void)
{
/* Step 4: Select Bank3 of SWC */
outb_p(inb(swc_base_addr + 0x0f) | 0x03, swc_base_addr + 0x0f);
#ifdef DEBUG
pr_info(DPFX "Select Bank3 of SWC\n");
#endif
}
/* Set watchdog timeout to x minutes */
static inline void pc87413_programm_wdto(char pc87413_time)
{
/* Step 5: Programm WDTO, Twd. */
outb_p(pc87413_time, swc_base_addr + WDTO);
#ifdef DEBUG
pr_info(DPFX "Set WDTO to %d minutes\n", pc87413_time);
#endif
}
/* Enable WDEN */
static inline void pc87413_enable_wden(void)
{
/* Step 6: Enable WDEN */
outb_p(inb(swc_base_addr + WDCTL) | 0x01, swc_base_addr + WDCTL);
#ifdef DEBUG
pr_info(DPFX "Enable WDEN\n");
#endif
}
/* Enable SW_WD_TREN */
static inline void pc87413_enable_sw_wd_tren(void)
{
/* Enable SW_WD_TREN */
outb_p(inb(swc_base_addr + WDCFG) | 0x80, swc_base_addr + WDCFG);
#ifdef DEBUG
pr_info(DPFX "Enable SW_WD_TREN\n");
#endif
}
/* Disable SW_WD_TREN */
static inline void pc87413_disable_sw_wd_tren(void)
{
/* Disable SW_WD_TREN */
outb_p(inb(swc_base_addr + WDCFG) & 0x7f, swc_base_addr + WDCFG);
#ifdef DEBUG
pr_info(DPFX "pc87413 - Disable SW_WD_TREN\n");
#endif
}
/* Enable SW_WD_TRG */
static inline void pc87413_enable_sw_wd_trg(void)
{
/* Enable SW_WD_TRG */
outb_p(inb(swc_base_addr + WDCTL) | 0x80, swc_base_addr + WDCTL);
#ifdef DEBUG
pr_info(DPFX "pc87413 - Enable SW_WD_TRG\n");
#endif
}
/* Disable SW_WD_TRG */
static inline void pc87413_disable_sw_wd_trg(void)
{
/* Disable SW_WD_TRG */
outb_p(inb(swc_base_addr + WDCTL) & 0x7f, swc_base_addr + WDCTL);
#ifdef DEBUG
pr_info(DPFX "Disable SW_WD_TRG\n");
#endif
}
/* -- Higher level functions ------------------------------------*/
/* Enable the watchdog */
static void pc87413_enable(void)
{
spin_lock(&io_lock);
pc87413_swc_bank3();
pc87413_programm_wdto(timeout);
pc87413_enable_wden();
pc87413_enable_sw_wd_tren();
pc87413_enable_sw_wd_trg();
spin_unlock(&io_lock);
}
/* Disable the watchdog */
static void pc87413_disable(void)
{
spin_lock(&io_lock);
pc87413_swc_bank3();
pc87413_disable_sw_wd_tren();
pc87413_disable_sw_wd_trg();
pc87413_programm_wdto(0);
spin_unlock(&io_lock);
}
/* Refresh the watchdog */
static void pc87413_refresh(void)
{
spin_lock(&io_lock);
pc87413_swc_bank3();
pc87413_disable_sw_wd_tren();
pc87413_disable_sw_wd_trg();
pc87413_programm_wdto(timeout);
pc87413_enable_wden();
pc87413_enable_sw_wd_tren();
pc87413_enable_sw_wd_trg();
spin_unlock(&io_lock);
}
/* -- File operations -------------------------------------------*/
/**
* pc87413_open:
* @inode: inode of device
* @file: file handle to device
*
*/
static int pc87413_open(struct inode *inode, struct file *file)
{
/* /dev/watchdog can only be opened once */
if (test_and_set_bit(0, &timer_enabled))
return -EBUSY;
if (nowayout)
__module_get(THIS_MODULE);
/* Reload and activate timer */
pc87413_refresh();
pr_info("Watchdog enabled. Timeout set to %d minute(s).\n", timeout);
return stream_open(inode, file);
}
/**
* pc87413_release:
* @inode: inode to board
* @file: file handle to board
*
* The watchdog has a configurable API. There is a religious dispute
* between people who want their watchdog to be able to shut down and
* those who want to be sure if the watchdog manager dies the machine
* reboots. In the former case we disable the counters, in the latter
* case you have to open it again very soon.
*/
static int pc87413_release(struct inode *inode, struct file *file)
{
/* Shut off the timer. */
if (expect_close == 42) {
pc87413_disable();
pr_info("Watchdog disabled, sleeping again...\n");
} else {
pr_crit("Unexpected close, not stopping watchdog!\n");
pc87413_refresh();
}
clear_bit(0, &timer_enabled);
expect_close = 0;
return 0;
}
/**
* pc87413_status:
*
* return, if the watchdog is enabled (timeout is set...)
*/
static int pc87413_status(void)
{
return 0; /* currently not supported */
}
/**
* pc87413_write:
* @file: file handle to the watchdog
* @data: data buffer to write
* @len: length in bytes
* @ppos: pointer to the position to write. No seeks allowed
*
* A write to a watchdog device is defined as a keepalive signal. Any
* write of data will do, as we we don't define content meaning.
*/
static ssize_t pc87413_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
/* See if we got the magic character 'V' and reload the timer */
if (len) {
if (!nowayout) {
size_t i;
/* reset expect flag */
expect_close = 0;
/* scan to see whether or not we got the
magic character */
for (i = 0; i != len; i++) {
char c;
if (get_user(
|