1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
451
452
453
454
455
456
457
458
459
460
461
462
463
464
465
466
467
468
469
470
471
472
473
474
475
476
477
478
479
480
481
482
483
484
485
486
487
488
489
490
491
492
493
494
495
496
497
498
499
500
501
502
503
504
505
506
507
508
509
510
511
512
513
514
515
516
517
518
519
520
521
522
523
524
525
526
527
528
529
530
531
532
533
534
535
536
537
538
539
540
541
542
543
544
545
546
547
548
549
550
551
552
553
554
555
556
557
558
559
560
561
562
563
564
565
566
567
568
569
570
571
572
573
574
575
576
577
578
579
580
581
582
583
584
585
586
587
588
589
590
591
592
593
594
595
596
597
598
599
600
601
602
603
604
605
606
607
608
609
610
611
612
613
614
615
616
617
618
619
620
621
622
623
624
625
626
627
628
629
630
631
632
633
634
635
636
637
638
639
640
641
642
643
644
645
646
647
648
649
650
651
652
653
654
655
656
657
658
659
660
661
662
663
664
665
666
667
668
669
670
671
672
673
674
675
676
677
678
679
680
681
682
683
684
685
686
687
688
689
690
691
692
693
694
695
696
697
698
699
700
701
702
703
704
705
706
707
708
709
710
711
712
713
714
715
716
717
718
719
720
721
722
723
724
725
726
727
728
729
730
731
732
733
734
735
736
737
738
739
740
741
742
743
744
745
746
747
748
749
|
// SPDX-License-Identifier: GPL-2.0-only
/*
*
* Hardware accelerated Matrox Millennium I, II, Mystique, G100, G200 and G400
*
* (c) 1998-2002 Petr Vandrovec <vandrove@vc.cvut.cz>
*
* Portions Copyright (c) 2001 Matrox Graphics Inc.
*
* Version: 1.65 2002/08/14
*
* MTRR stuff: 1998 Tom Rini <trini@kernel.crashing.org>
*
* Contributors: "menion?" <menion@mindless.com>
* Betatesting, fixes, ideas
*
* "Kurt Garloff" <garloff@suse.de>
* Betatesting, fixes, ideas, videomodes, videomodes timmings
*
* "Tom Rini" <trini@kernel.crashing.org>
* MTRR stuff, PPC cleanups, betatesting, fixes, ideas
*
* "Bibek Sahu" <scorpio@dodds.net>
* Access device through readb|w|l and write b|w|l
* Extensive debugging stuff
*
* "Daniel Haun" <haund@usa.net>
* Testing, hardware cursor fixes
*
* "Scott Wood" <sawst46+@pitt.edu>
* Fixes
*
* "Gerd Knorr" <kraxel@goldbach.isdn.cs.tu-berlin.de>
* Betatesting
*
* "Kelly French" <targon@hazmat.com>
* "Fernando Herrera" <fherrera@eurielec.etsit.upm.es>
* Betatesting, bug reporting
*
* "Pablo Bianucci" <pbian@pccp.com.ar>
* Fixes, ideas, betatesting
*
* "Inaky Perez Gonzalez" <inaky@peloncho.fis.ucm.es>
* Fixes, enhandcements, ideas, betatesting
*
* "Ryuichi Oikawa" <roikawa@rr.iiij4u.or.jp>
* PPC betatesting, PPC support, backward compatibility
*
* "Paul Womar" <Paul@pwomar.demon.co.uk>
* "Owen Waller" <O.Waller@ee.qub.ac.uk>
* PPC betatesting
*
* "Thomas Pornin" <pornin@bolet.ens.fr>
* Alpha betatesting
*
* "Pieter van Leuven" <pvl@iae.nl>
* "Ulf Jaenicke-Roessler" <ujr@physik.phy.tu-dresden.de>
* G100 testing
*
* "H. Peter Arvin" <hpa@transmeta.com>
* Ideas
*
* "Cort Dougan" <cort@cs.nmt.edu>
* CHRP fixes and PReP cleanup
*
* "Mark Vojkovich" <mvojkovi@ucsd.edu>
* G400 support
*
* (following author is not in any relation with this code, but his code
* is included in this driver)
*
* Based on framebuffer driver for VBE 2.0 compliant graphic boards
* (c) 1998 Gerd Knorr <kraxel@cs.tu-berlin.de>
*
* (following author is not in any relation with this code, but his ideas
* were used when writing this driver)
*
* FreeVBE/AF (Matrox), "Shawn Hargreaves" <shawn@talula.demon.co.uk>
*
*/
#include "matroxfb_Ti3026.h"
#include "matroxfb_misc.h"
#include "matroxfb_accel.h"
#include <linux/matroxfb.h>
#ifdef CONFIG_FB_MATROX_MILLENIUM
#define outTi3026 matroxfb_DAC_out
#define inTi3026 matroxfb_DAC_in
#define TVP3026_INDEX 0x00
#define TVP3026_PALWRADD 0x00
#define TVP3026_PALDATA 0x01
#define TVP3026_PIXRDMSK 0x02
#define TVP3026_PALRDADD 0x03
#define TVP3026_CURCOLWRADD 0x04
#define TVP3026_CLOVERSCAN 0x00
#define TVP3026_CLCOLOR0 0x01
#define TVP3026_CLCOLOR1 0x02
#define TVP3026_CLCOLOR2 0x03
#define TVP3026_CURCOLDATA 0x05
#define TVP3026_CURCOLRDADD 0x07
#define TVP3026_CURCTRL 0x09
#define TVP3026_X_DATAREG 0x0A
#define TVP3026_CURRAMDATA 0x0B
#define TVP3026_CURPOSXL 0x0C
#define TVP3026_CURPOSXH 0x0D
#define TVP3026_CURPOSYL 0x0E
#define TVP3026_CURPOSYH 0x0F
#define TVP3026_XSILICONREV 0x01
#define TVP3026_XCURCTRL 0x06
#define TVP3026_XCURCTRL_DIS 0x00 /* transparent, transparent, transparent, transparent */
#define TVP3026_XCURCTRL_3COLOR 0x01 /* transparent, 0, 1, 2 */
#define TVP3026_XCURCTRL_XGA 0x02 /* 0, 1, transparent, complement */
#define TVP3026_XCURCTRL_XWIN 0x03 /* transparent, transparent, 0, 1 */
#define TVP3026_XCURCTRL_BLANK2048 0x00
#define TVP3026_XCURCTRL_BLANK4096 0x10
#define TVP3026_XCURCTRL_INTERLACED 0x20
#define TVP3026_XCURCTRL_ODD 0x00 /* ext.signal ODD/\EVEN */
#define TVP3026_XCURCTRL_EVEN 0x40 /* ext.signal EVEN/\ODD */
#define TVP3026_XCURCTRL_INDIRECT 0x00
#define TVP3026_XCURCTRL_DIRECT 0x80
#define TVP3026_XLATCHCTRL 0x0F
#define TVP3026_XLATCHCTRL_1_1 0x06
#define TVP3026_XLATCHCTRL_2_1 0x07
#define TVP3026_XLATCHCTRL_4_1 0x06
#define TVP3026_XLATCHCTRL_8_1 0x06
#define TVP3026_XLATCHCTRL_16_1 0x06
#define TVP3026A_XLATCHCTRL_4_3 0x06 /* ??? do not understand... but it works... !!! */
#define TVP3026A_XLATCHCTRL_8_3 0x07
#define TVP3026B_XLATCHCTRL_4_3 0x08
#define TVP3026B_XLATCHCTRL_8_3 0x06 /* ??? do not understand... but it works... !!! */
#define TVP3026_XTRUECOLORCTRL 0x18
#define TVP3026_XTRUECOLORCTRL_VRAM_SHIFT_ACCEL 0x00
#define TVP3026_XTRUECOLORCTRL_VRAM_SHIFT_TVP 0x20
#define TVP3026_XTRUECOLORCTRL_PSEUDOCOLOR 0x80
#define TVP3026_XTRUECOLORCTRL_TRUECOLOR 0x40 /* paletized */
#define TVP3026_XTRUECOLORCTRL_DIRECTCOLOR 0x00
#define TVP3026_XTRUECOLORCTRL_24_ALTERNATE 0x08 /* 5:4/5:2 instead of 4:3/8:3 */
#define TVP3026_XTRUECOLORCTRL_RGB_888 0x16 /* 4:3/8:3 (or 5:4/5:2) */
#define TVP3026_XTRUECOLORCTRL_BGR_888 0x17
#define TVP3026_XTRUECOLORCTRL_ORGB_8888 0x06
#define TVP3026_XTRUECOLORCTRL_BGRO_8888 0x07
#define TVP3026_XTRUECOLORCTRL_RGB_565 0x05
#define TVP3026_XTRUECOLORCTRL_ORGB_1555 0x04
#define TVP3026_XTRUECOLORCTRL_RGB_664 0x03
#define TVP3026_XTRUECOLORCTRL_RGBO_4444 0x01
#define TVP3026_XMUXCTRL 0x19
#define TVP3026_XMUXCTRL_MEMORY_8BIT 0x01 /* - */
#define TVP3026_XMUXCTRL_MEMORY_16BIT 0x02 /* - */
#define TVP3026_XMUXCTRL_MEMORY_32BIT 0x03 /* 2MB RAM, 512K * 4 */
#define TVP3026_XMUXCTRL_MEMORY_64BIT 0x04 /* >2MB RAM, 512K * 8 & more */
#define TVP3026_XMUXCTRL_PIXEL_4BIT 0x40 /* L0,H0,L1,H1... */
#define TVP3026_XMUXCTRL_PIXEL_4BIT_SWAPPED 0x60 /* H0,L0,H1,L1... */
#define TVP3026_XMUXCTRL_PIXEL_8BIT 0x48
#define TVP3026_XMUXCTRL_PIXEL_16BIT 0x50
#define TVP3026_XMUXCTRL_PIXEL_32BIT 0x58
#define TVP3026_XMUXCTRL_VGA 0x98 /* VGA MEMORY, 8BIT PIXEL */
#define TVP3026_XCLKCTRL 0x1A
#define TVP3026_XCLKCTRL_DIV1 0x00
#define TVP3026_XCLKCTRL_DIV2 0x10
#define TVP3026_XCLKCTRL_DIV4 0x20
#define TVP3026_XCLKCTRL_DIV8 0x30
#define TVP3026_XCLKCTRL_DIV16 0x40
#define TVP3026_XCLKCTRL_DIV32 0x50
#define TVP3026_XCLKCTRL_DIV64 0x60
#define TVP3026_XCLKCTRL_CLKSTOPPED 0x70
#define TVP3026_XCLKCTRL_SRC_CLK0 0x00
#define TVP3026_XCLKCTRL_SRC_CLK1 0x01
#define TVP3026_XCLKCTRL_SRC_CLK2 0x02 /* CLK2 is TTL source*/
#define TVP3026_XCLKCTRL_SRC_NCLK2 0x03 /* not CLK2 is TTL source */
#define TVP3026_XCLKCTRL_SRC_ECLK2 0x04 /* CLK2 and not CLK2 is ECL source */
#define TVP3026_XCLKCTRL_SRC_PLL 0x05
#define TVP3026_XCLKCTRL_SRC_DIS 0x06 /* disable & poweroff internal clock */
#define TVP3026_XCLKCTRL_SRC_CLK0VGA 0x07
#define TVP3026_XPALETTEPAGE 0x1C
#define TVP3026_XGENCTRL 0x1D
#define TVP3026_XGENCTRL_HSYNC_POS 0x00
#define TVP3026_XGENCTRL_HSYNC_NEG 0x01
#define TVP3026_XGENCTRL_VSYNC_POS 0x00
#define TVP3026_XGENCTRL_VSYNC_NEG 0x02
#define TVP3026_XGENCTRL_LITTLE_ENDIAN 0x00
#define TVP3026_XGENCTRL_BIG_ENDIAN 0x08
#define TVP3026_XGENCTRL_BLACK_0IRE 0x00
#define TVP3026_XGENCTRL_BLACK_75IRE 0x10
#define TVP3026_XGENCTRL_NO_SYNC_ON_GREEN 0x00
#define TVP3026_XGENCTRL_SYNC_ON_GREEN 0x20
#define TVP3026_XGENCTRL_OVERSCAN_DIS 0x00
#define TVP3026_XGENCTRL_OVERSCAN_EN 0x40
#define TVP3026_XMISCCTRL 0x1E
#define TVP3026_XMISCCTRL_DAC_PUP 0x00
#define TVP3026_XMISCCTRL_DAC_PDOWN 0x01
#define TVP3026_XMISCCTRL_DAC_EXT 0x00 /* or 8, bit 3 is ignored */
#define TVP3026_XMISCCTRL_DAC_6BIT 0x04
#define TVP3026_XMISCCTRL_DAC_8BIT 0x0C
#define TVP3026_XMISCCTRL_PSEL_DIS 0x00
#define TVP3026_XMISCCTRL_PSEL_EN 0x10
#define TVP3026_XMISCCTRL_PSEL_LOW 0x00 /* PSEL high selects directcolor */
#define TVP3026_XMISCCTRL_PSEL_HIGH 0x20 /* PSEL high selects truecolor or pseudocolor */
#define TVP3026_XGENIOCTRL 0x2A
#define TVP3026_XGENIODATA 0x2B
#define TVP3026_XPLLADDR 0x2C
#define TVP3026_XPLLADDR_X(LOOP,MCLK,PIX) (((LOOP)<<4) | ((MCLK)<<2) | (PIX))
#define TVP3026_XPLLDATA_N 0x00
#define TVP3026_XPLLDATA_M 0x01
#define TVP3026_XPLLDATA_P 0x02
#define TVP3026_XPLLDATA_STAT 0x03
#define TVP3026_XPIXPLLDATA 0x2D
#define TVP3026_XMEMPLLDATA 0x2E
#define TVP3026_XLOOPPLLDATA 0x2F
#define TVP3026_XCOLKEYOVRMIN 0x30
#define TVP3026_XCOLKEYOVRMAX 0x31
#define TVP3026_XCOLKEYREDMIN 0x32
#define TVP3026_XCOLKEYREDMAX 0x33
#define TVP3026_XCOLKEYGREENMIN 0x34
#define TVP3026_XCOLKEYGREENMAX 0x35
#define TVP3026_XCOLKEYBLUEMIN 0x36
#define TVP3026_XCOLKEYBLUEMAX 0x37
#define TVP3026_XCOLKEYCTRL 0x38
#define TVP3026_XCOLKEYCTRL_OVR_EN 0x01
#define TVP3026_XCOLKEYCTRL_RED_EN 0x02
#define TVP3026_XCOLKEYCTRL_GREEN_EN 0x04
#define TVP3026_XCOLKEYCTRL_BLUE_EN 0x08
#define TVP3026_XCOLKEYCTRL_NEGATE 0x10
#define TVP3026_XCOLKEYCTRL_ZOOM1 0x00
#define TVP3026_XCOLKEYCTRL_ZOOM2 0x20
#define TVP3026_XCOLKEYCTRL_ZOOM4 0x40
#define TVP3026_XCOLKEYCTRL_ZOOM8 0x60
#define TVP3026_XCOLKEYCTRL_ZOOM16 0x80
#define TVP3026_XCOLKEYCTRL_ZOOM32 0xA0
#define TVP3026_XMEMPLLCTRL 0x39
#define TVP3026_XMEMPLLCTRL_DIV(X) (((X)-1)>>1) /* 2,4,6,8,10,12,14,16, division applied to LOOP PLL after divide by 2^P */
#define TVP3026_XMEMPLLCTRL_STROBEMKC4 0x08
#define TVP3026_XMEMPLLCTRL_MCLK_DOTCLOCK 0x00 /* MKC4 */
#define TVP3026_XMEMPLLCTRL_MCLK_MCLKPLL 0x10 /* MKC4 */
#define TVP3026_XMEMPLLCTRL_RCLK_PIXPLL 0x00
#define TVP3026_XMEMPLLCTRL_RCLK_LOOPPLL 0x20
#define TVP3026_XMEMPLLCTRL_RCLK_DOTDIVN 0x40 /* dot clock divided by loop pclk N prescaler */
#define TVP3026_XSENSETEST 0x3A
#define TVP3026_XTESTMODEDATA 0x3B
#define TVP3026_XCRCREML 0x3C
#define TVP3026_XCRCREMH 0x3D
#define TVP3026_XCRCBITSEL 0x3E
#define TVP3026_XID 0x3F
static const unsigned char DACseq[] =
{ TVP3026_XLATCHCTRL, TVP3026_XTRUECOLORCTRL,
TVP3026_XMUXCTRL, TVP3026_XCLKCTRL,
TVP3026_XPALETTEPAGE,
TVP3026_XGENCTRL,
TVP3026_XMISCCTRL,
TVP3026_XGENIOCTRL,
TVP3026_XGENIODATA,
TVP3026_XCOLKEYOVRMIN, TVP3026_XCOLKEYOVRMAX, TVP3026_XCOLKEYREDMIN, TVP3026_XCOLKEYREDMAX,
TVP3026_XCOLKEYGREENMIN, TVP3026_XCOLKEYGREENMAX, TVP3026_XCOLKEYBLUEMIN, TVP3026_XCOLKEYBLUEMAX,
TVP3026_XCOLKEYCTRL,
TVP3026_XMEMPLLCTRL, TVP3026_XSENSETEST, TVP3026_XCURCTRL };
#define POS3026_XLATCHCTRL 0
#define POS3026_XTRUECOLORCTRL 1
#define POS3026_XMUXCTRL 2
#define POS3026_XCLKCTRL 3
#define POS3026_XGENCTRL 5
#define POS3026_XMISCCTRL 6
#define POS3026_XMEMPLLCTRL 18
#define POS3026_XCURCTRL 20
static const unsigned char MGADACbpp32[] =
{ TVP3026_XLATCHCTRL_2_1, TVP3026_XTRUECOLORCTRL_DIRECTCOLOR | TVP3026_XTRUECOLORCTRL_ORGB_8888,
0x00, TVP3026_XCLKCTRL_DIV1 | TVP3026_XCLKCTRL_SRC_PLL,
0x00,
TVP3026_XGENCTRL_HSYNC_POS | TVP3026_XGENCTRL_VSYNC_POS | TVP3026_XGENCTRL_LITTLE_ENDIAN | TVP3026_XGENCTRL_BLACK_0IRE | TVP3026_XGENCTRL_NO_SYNC_ON_GREEN | TVP3026_XGENCTRL_OVERSCAN_DIS,
TVP3026_XMISCCTRL_DAC_PUP | TVP3026_XMISCCTRL_DAC_8BIT | TVP3026_XMISCCTRL_PSEL_DIS | TVP3026_XMISCCTRL_PSEL_HIGH,
0x00,
0x1E,
0xFF, 0xFF, 0xFF, 0xFF,
0xFF, 0xFF, 0xFF, 0xFF,
TVP3026_XCOLKEYCTRL_ZOOM1,
0x00, 0x00, TVP3026_XCURCTRL_DIS };
static int Ti3026_calcclock(const struct matrox_fb_info *minfo,
unsigned int freq, unsigned int fmax, int *in,
int *feed, int *post)
{
unsigned int fvco;
unsigned int lin, lfeed, lpost;
DBG(__func__)
fvco = PLL_calcclock(minfo, freq, fmax, &lin, &lfeed, &lpost);
fvco >>= (*post = lpost);
*in = 64 - lin;
*feed = 64 - lfeed;
return fvco;
}
static int Ti3026_setpclk(struct matrox_fb_info *minfo, int clk)
{
unsigned int f_pll;
unsigned int pixfeed, pixin, pixpost;
struct matrox_hw_state *hw = &minfo->hw;
DBG(__func__)
f_pll = Ti3026_calcclock(minfo, clk, minfo->max_pixel_clock, &pixin, &pixfeed, &pixpost);
hw->DACclk[0] = pixin | 0xC0;
hw->DACclk[1] = pixfeed;
hw->DACclk[2] = pixpost | 0xB0;
{
unsigned int loopfeed, loopin, looppost, loopdiv, z;
unsigned int Bpp;
Bpp = minfo->curr.final_bppShift;
if (minfo->fbcon.va
|