/*
* i740fb - framebuffer driver for Intel740
* Copyright (c) 2011 Ondrej Zary
*
* Based on old i740fb driver (c) 2001-2002 Andrey Ulanov <drey@rt.mipt.ru>
* which was partially based on:
* VGA 16-color framebuffer driver (c) 1999 Ben Pfaff <pfaffben@debian.org>
* and Petr Vandrovec <VANDROVE@vc.cvut.cz>
* i740 driver from XFree86 (c) 1998-1999 Precision Insight, Inc., Cedar Park,
* Texas.
* i740fb by Patrick LERDA, v0.9
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/mm.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/fb.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pci_ids.h>
#include <linux/i2c.h>
#include <linux/i2c-algo-bit.h>
#include <linux/console.h>
#include <video/vga.h>
#include "i740_reg.h"
static char *mode_option;
static int mtrr = 1;
struct i740fb_par {
unsigned char __iomem *regs;
bool has_sgram;
int wc_cookie;
bool ddc_registered;
struct i2c_adapter ddc_adapter;
struct i2c_algo_bit_data ddc_algo;
u32 pseudo_palette[16];
struct mutex open_lock;
unsigned int ref_count;
u8 crtc[VGA_CRT_C];
u8 atc[VGA_ATT_C];
u8 gdc[VGA_GFX_C];
u8 seq[VGA_SEQ_C];
u8 misc;
u8 vss;
/* i740 specific registers */
u8 display_cntl;
u8 pixelpipe_cfg0;
u8 pixelpipe_cfg1;
u8 pixelpipe_cfg2;
u8 video_clk2_m;
u8 video_clk2_n;
u8 video_clk2_mn_msbs;
u8 video_clk2_div_sel;
u8 pll_cntl;
u8 address_mapping;
u8 io_cntl;
u8 bitblt_cntl;
u8 ext_vert_total;
u8 ext_vert_disp_end;
u8 ext_vert_sync_start;
u8 ext_vert_blank_start;
u8 ext_horiz_total;
u8 ext_horiz_blank;
u8 ext_offset;
u8 interlace_cntl;
u32 lmi_fifo_watermark;
u8 ext_start_addr;
u8 ext_start_addr_hi;
};
#define DACSPEED8 203
#define DACSPEED16 163
#define DACSPEED24_SG 136
#define DACSPEED24_SD 128
#define DACSPEED32 86
static const struct fb_fix_screeninfo i740fb_fix = {
.id = "i740fb",
.type = FB_TYPE_PACKED_PIXELS,
.visual = FB_VISUAL_TRUECOLOR,
.xpanstep = 8,
.ypanstep = 1,
.accel = FB_ACCEL_NONE,
};
static inline void i740outb(struct i740fb_par *par, u16 port, u8 val)
{
vga_mm_w(par->regs,