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/* cg14.c: CGFOURTEEN frame buffer driver
*
* Copyright (C) 2003 David S. Miller (davem@redhat.com)
* Copyright (C) 1996,1998 Jakub Jelinek (jj@ultra.linux.cz)
* Copyright (C) 1995 Miguel de Icaza (miguel@nuclecu.unam.mx)
*
* Driver layout based loosely on tgafb.c, see that file for credits.
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/errno.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include <linux/init.h>
#include <linux/fb.h>
#include <linux/mm.h>
#include <asm/io.h>
#include <asm/sbus.h>
#include <asm/oplib.h>
#include <asm/fbio.h>
#include "sbuslib.h"
/*
* Local functions.
*/
static int cg14_setcolreg(unsigned, unsigned, unsigned, unsigned,
unsigned, struct fb_info *);
static int cg14_mmap(struct fb_info *, struct file *, struct vm_area_struct *);
static int cg14_ioctl(struct inode *, struct file *, unsigned int,
unsigned long, struct fb_info *);
static int cg14_pan_display(struct fb_var_screeninfo *, struct fb_info *);
/*
* Frame buffer operations
*/
static struct fb_ops cg14_ops = {
.owner = THIS_MODULE,
.fb_setcolreg = cg14_setcolreg,
.fb_pan_display = cg14_pan_display,
.fb_fillrect = cfb_fillrect,
.fb_copyarea = cfb_copyarea,
.fb_imageblit = cfb_imageblit,
.fb_mmap = cg14_mmap,
.fb_ioctl = cg14_ioctl,
.fb_cursor = soft_cursor,
};
#define CG14_MCR_INTENABLE_SHIFT 7
#define CG14_MCR_INTENABLE_MASK 0x80
#define CG14_MCR_VIDENABLE_SHIFT 6
#define CG14_MCR_VIDENABLE_MASK 0x40
#define CG14_MCR_PIXMODE_SHIFT 4
#define CG14_MCR_PIXMODE_MASK 0x30
#define CG14_MCR_TMR_SHIFT 2
#define CG14_MCR_TMR_MASK 0x0c
#define CG14_MCR_TMENABLE_SHIFT 1
#define CG14_MCR_TMENABLE_MASK 0x02
#define CG14_MCR_RESET_SHIFT 0
#define CG14_MCR_RESET_MASK 0x01
#define CG14_REV_REVISION_SHIFT 4
#define CG14_REV_REVISION_MASK 0xf0
#define CG14_REV_IMPL_SHIFT 0
#define CG14_REV_IMPL_MASK 0x0f
#define CG14_VBR_FRAMEBASE_SHIFT 12
#define CG14_VBR_FRAMEBASE_MASK 0x00fff000
#define CG14_VMCR1_SETUP_SHIFT 0
#define CG14_VMCR1_SETUP_MASK 0x000001ff
#define CG14_VMCR1_VCONFIG_SHIFT 9
#define CG14_VMCR1_VCONFIG_MASK 0x00000e00
#define CG14_VMCR2_REFRESH_SHIFT 0
#define CG14_VMCR2_REFRESH_MASK 0x00000001
#define CG14_VMCR2_TESTROWCNT_SHIFT 1
#define CG14_VMCR2_TESTROWCNT_MASK 0x00000002
#define CG14_VMCR2_FBCONFIG_SHIFT 2
#define CG14_VMCR2_FBCONFIG_MASK 0x0000000c
#define CG14_VCR_REFRESHREQ_SHIFT 0
#define CG14_VCR_REFRESHREQ_MASK 0x000003ff
#define CG14_VCR1_REFRESHENA_SHIFT 10
#define CG14_VCR1_REFRESHENA_MASK 0x00000400
#define CG14_VCA_CAD_SHIFT 0
#define CG14_VCA_CAD_MASK 0x000003ff
#define CG14_VCA_VERS_SHIFT 10
#define CG14_VCA_VERS_MASK 0x00000c00
#define CG14_VCA_RAMSPEED_SHIFT 12
#define CG14_VCA_RAMSPEED_MASK 0x00001000
#define CG14_VCA_8MB_SHIFT 13
#define CG14_VCA_8MB_MASK 0x00002000
#define CG14_MCR_PIXMODE_8 0
#define CG14_MCR_PIXMODE_16 2
#define CG14_MCR_PIXMODE_32 3
struct cg14_regs{
volatile u8 mcr; /* Master Control Reg */
volatile u8 ppr; /* Packed Pixel Reg */
volatile u8 tms[2]; /* Test Mode Status Regs */
volatile u8 msr; /* Master Status Reg */
volatile u8 fsr; /* Fault Status Reg */
volatile u8 rev; /* Revision & Impl */
volatile u8 ccr; /* Clock Control Reg */
volatile u32 tmr; /* Test Mode Read Back */
volatile u8 mod; /* Monitor Operation Data Reg */
volatile u8 acr; /* Aux Control */
u8 xxx0[6];
volatile u16 hct; /* Hor Counter */
volatile u16 vct; /* Vert Counter */
volatile u16 hbs; /* Hor Blank Start */
volatile u16 hbc; /* Hor Blank Clear */
volatile u16 hss; /* Hor Sync Start */
volatile u16 hsc; /* Hor Sync Clear */
volatile u16 csc; /* Composite Sync Clear */
volatile u16 vbs; /* Vert Blank Start */
volatile u16 vbc; /* Vert Blank Clear */
volatile u16 vss; /* Vert Sync Start */
volatile u16 vsc; /* Vert Sync Clear */
volatile u16 xcs;
volatile u16 xcc;
volatile u16 fsa; /* Fault Status Address */
volatile u16 adr; /* Address Registers */
u8 xxx1[0xce];
volatile u8 pcg[0x100]; /* Pixel Clock Generator */
volatile u32 vbr; /* Frame Base Row */
volatile u32 vmcr; /* VBC Master Control */
volatile u32 vcr; /* VBC refresh */
volatile u32 vca; /* VBC Config */
};
#define CG14_CCR_ENABLE 0x04
#define CG14_CCR_SELECT 0x02 /* HW/Full screen */
struct cg14_cursor {
volatile u32 cpl0[32]; /* Enable plane 0 */
volatile u32 cpl1[32]; /* Color selection plane */
volatile u8 ccr; /* Cursor Control Reg */
u8 xxx0[3];
volatile u16 cursx; /* Cursor x,y position */
volatile u16 cursy; /* Cursor x,y position */
volatile u32 color0;
volatile u32 color1;
u32 xxx1[0x1bc];
volatile u32 cpl0i[32]; /* Enable plane 0 autoinc */
volatile u32 cpl1i[32]; /* Color selection autoinc */
};
struct cg14_dac {
volatile u8 addr; /* Address Register */
u8 xxx0[255];
volatile u8 glut; /* Gamma table */
u8 xxx1[255];
volatile u8 select; /* Register Select */
u8 xxx2[255];
volatile u8 mode; /* Mode Register */
};
struct cg14_xlut{
volatile u8 x_xlut [256];
volatile u8 x_xlutd [256];
u8 xxx0[0x600];
volatile u8 x_xlut_inc [256];
volatile u8 x_xlutd_inc [256];
};
/* Color look up table (clut) */
/* Each one of these arrays hold the color lookup table (for 256
* colors) for each MDI page (I assume then there should be 4 MDI
* pages, I still wonder what they are. I have seen NeXTStep split
* the screen in four parts, while operating in 24 bits mode. Each
* integer holds 4 values: alpha value (transparency channel, thanks
* go to John Stone (johns@umr.edu) from OpenBSD), red, green and blue
*
* I currently use the clut instead of the Xlut
*/
struct cg14_clut {
u32 c_clut [256];
u32 c_clutd [256]; /* i wonder what the 'd' is for */
u32 c_clut_inc [256];
u32 c_clutd_inc [256];
};
#define CG14_MMAP_ENTRIES 16
struct cg14_par {
spinlock_t lock;
struct cg14_regs __iomem *regs;
struct cg14_clut __iomem *clut;
struct cg14_cursor __iomem *cursor;
u32 flags;
#define CG14_FLAG_BLANKED 0x00000001
unsigned long physbase;
unsigned long iospace;
unsigned long fbsize;
struct sbus_mmap_map mmap_map[CG14_MMAP_ENTRIES];
int mode;
int ramsize;
struct sbus_dev *sdev;
struct list_head list;
};
static void __cg14_reset(struct cg14_par *par)
{
struct cg14_regs __iomem *regs = par->regs;
u8 val;
val = sbus_readb(®s->mcr);
val &= ~(CG14_MCR_PIXMODE_MASK);
sbus_writeb(val, ®s->mcr);
}
static int cg14_pan_display(struct fb_var_screeninfo *var, struct fb_info *info)
{
struct cg14_par *par = (struct cg14_par *) info->par;
unsigned long flags;
/* We just use this to catch switches out of
* graphics mode.
*/
spin_lock_irqsave(&par->lock, flags);
__cg14_reset(par);
spin_unlock_irqrestore(&par->lock, flags);
if (var->xoffset || var->yoffset || var->vmode)
return -EINVAL;
return 0;
}
/**
* cg14_setcolreg - Optional function. Sets a color register.
* @regno: boolean, 0 copy local, 1 get_user() function
* @red: frame buffer colormap structure
* @green: The green value which can be up to 16 bits wide
* @blue: The blue value which can be up to 16 bits wide.
* @transp: If supported the alpha value which can be up to 16 bits wide.
* @info: frame buffer info structure
*/
static int cg14_setcolreg(unsigned regno,
unsigned red, unsigned green, unsigned blue,
unsigned transp, struct fb_info *info)
{
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