// SPDX-License-Identifier: GPL-2.0
/*
* Texas Instruments DSPS platforms "glue layer"
*
* Copyright (C) 2012, by Texas Instruments
*
* Based on the am35x "glue layer" code.
*
* This file is part of the Inventra Controller Driver for Linux.
*
* musb_dsps.c will be a common file for all the TI DSPS platforms
* such as dm64x, dm36x, dm35x, da8x, am35x and ti81x.
* For now only ti81x is using this and in future davinci.c, am35x.c
* da8xx.c would be merged to this file after testing.
*/
#include <linux/io.h>
#include <linux/err.h>
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/pm_runtime.h>
#include <linux/module.h>
#include <linux/usb/usb_phy_generic.h>
#include <linux/platform_data/usb-omap.h>
#include <linux/sizes.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/of_address.h>
#include <linux/of_irq.h>
#include <linux/usb/of.h>
#include <linux/debugfs.h>
#include "musb_core.h"
static const struct of_device_id musb_dsps_of_match[];
/**
* DSPS musb wrapper register offset.
* FIXME: This should be expanded to have all the wrapper registers from TI DSPS
* musb ips.
*/
struct dsps_musb_wrapper {
u16 revision;
u16 control;
u16 status;
u16 epintr_set;
u16 epintr_clear;
u16 epintr_status;
u16 coreintr_set;
u16 coreintr_clear;
u16 coreintr_status;
u16 phy_utmi;
u16 mode;
u16 tx_mode;
u16 rx_mode;
/* bit positions for control */
unsigned reset:5;
/* bit positions for interrupt */
unsigned usb_shift:5;
u32 usb_mask;
u32 usb_bitmap;
unsigned drvvbus:5;
unsigned txep_shift:5;
u32 txep_mask;
u32 txep_bitmap;
unsigned rxep_shift:5;
u32 rxep_mask;
u32 rxep_bitmap;
/* bit positions for phy_utmi */
unsigned otg_disable:5;
/* bit positions for mode */
unsigned iddig:5;
unsigned iddig_mux:5;
/* miscellaneous stuff */
unsigned poll_timeout;
};
/*
* register shadow for suspend
*/
struct dsps_context {
u32 control;
u32 epintr;
u32 coreintr;
u32 phy_utmi;
u32 mode;
u32 tx_mode;
u32 rx_mode;
};
/**
* DSPS glue structure.
*/
struct dsps_glue {
struct device *dev;
struct platform_device *musb; /* child musb pdev */
const struct dsps_musb_wrapper *wrp; /* wrapper register offsets */
int vbus_irq; /* optional vbus irq */
unsigned long last_timer; /* last timer data for each instance */
bool sw_babble_enabled;
void __iomem *usbss_base;
struct dsps_context context;
struct debugfs_regset32 regset;
struct dentry *dbgfs_root;
};
static const struct debugfs_reg32 dsps_musb_regs[] = {
{ "revision", 0x00 },
{ "control", 0x14 },
{ "status", 0x18 },
{ "eoi", 0x24 },
{ "intr0_stat", 0x30 },
{ "intr1_stat", 0x34 },
{ "intr0_set", 0x38 },
{ "intr1_set", 0x3c },
{ "txmode", 0x70 },
{ "rxmode", 0x74 },
{ "autoreq", 0xd0 },
{ "srpfixtime", 0xd4 },
{ "tdown", 0xd8 },
{ "phy_utmi", 0xe0 },
{ "mode", 0xe8 },
};
static void dsps_mod_timer(struct dsps_glue *glue, int wait_ms)
{
struct musb *musb = platform_get_drvdata(glue->musb);
int wait;
if (wait_ms < 0)
wait = msecs_to_jiffies(glue->wrp->poll_timeout);
else
wait = msecs_to_jiffies(wait_ms);
mod_timer(&musb->dev_timer, jiffies + wait);
}
/*
* If no vbus irq from the PMIC is configured, we need to poll VBUS status.
*/
static void dsps_mod_timer_optional(struct dsps_glue *glue)
{
if (glue->vbus_irq)
return;
dsps_mod_timer(glue, -1);
}
/* USBSS / USB AM335x */
#define USBSS_IRQ_STATUS 0x28
#define USBSS_IRQ_ENABLER 0x2c
#define USBSS_IRQ_CLEARR 0x30
#define USBSS_IRQ_PD_COMP (1 << 2)
/**
* dsps_musb_enable - enable interrupts
*/
static void dsps_musb_enable(struct musb *musb)
{
struct device *dev = musb->controller;
struct platform_device *pdev = to_platform_device(dev->parent);
struct dsps_glue *glue = platform_get_drvdata(pdev);
const struct dsps_musb_wrapper *wrp =