// SPDX-License-Identifier: GPL-2.0+
/*
* Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
* All rights reserved.
*
* File: rf.c
*
* Purpose: rf function code
*
* Author: Jerry Chen
*
* Date: Feb. 19, 2004
*
* Functions:
* IFRFbWriteEmbedded - Embedded write RF register via MAC
*
* Revision History:
* RobertYu 2005
* chester 2008
*
*/
#include "mac.h"
#include "srom.h"
#include "rf.h"
#include "baseband.h"
#define BY_AL2230_REG_LEN 23 /* 24bit */
#define CB_AL2230_INIT_SEQ 15
#define SWITCH_CHANNEL_DELAY_AL2230 200 /* us */
#define AL2230_PWR_IDX_LEN 64
#define BY_AL7230_REG_LEN 23 /* 24bit */
#define CB_AL7230_INIT_SEQ 16
#define SWITCH_CHANNEL_DELAY_AL7230 200 /* us */
#define AL7230_PWR_IDX_LEN 64
static const unsigned long dwAL2230InitTable[CB_AL2230_INIT_SEQ] = {
0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x01A00200 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00FFF300 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0005A400 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0F4DC500 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0805B600 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0146C700 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00068800 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0403B900 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00DBBA00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00099B00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x0BDFFC00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00000D00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,
0x00580F00 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW
};
static const unsigned long dwAL2230ChannelTable0[CB_MAX_CHANNEL] = {
0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
0x03F79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
0x03E79000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
0x03F7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
0x03E7A000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
0x03F7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
0x03E7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 2462MHz */
0x03E7B000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 2467MHz */
0x03F7C000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 13, Tf = 2472MHz */
0x03E7C000 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW /* channel = 14, Tf = 2412M */
};
static const unsigned long dwAL2230ChannelTable1[CB_MAX_CHANNEL] = {
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 1, Tf = 2412MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 2, Tf = 2417MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 3, Tf = 2422MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 4, Tf = 2427MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 5, Tf = 2432MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 6, Tf = 2437MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 7, Tf = 2442MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 8, Tf = 2447MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 9, Tf = 2452MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 10, Tf = 2457MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 11, Tf = 2462MHz */
0x0B333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW, /* channel = 12, Tf = 2467MHz */
0x03333100 + (BY_AL2230_REG_LEN << 3) + IFREGCTL_REGW,