/* * tsi148.h * * Support for the Tundra TSI148 VME Bridge chip * * Author: Tom Armistead * Updated and maintained by Ajit Prem * Copyright 2004 Motorola Inc. * * This program is free software; you can redistribute it and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation; either version 2 of the License, or (at your * option) any later version. */#ifndef TSI148_H#define TSI148_H#ifndef PCI_VENDOR_ID_TUNDRA#define PCI_VENDOR_ID_TUNDRA 0x10e3#endif#ifndef PCI_DEVICE_ID_TUNDRA_TSI148#define PCI_DEVICE_ID_TUNDRA_TSI148 0x148#endif/* * Define the number of each that the Tsi148 supports. */#define TSI148_MAX_MASTER 8 /* Max Master Windows */#define TSI148_MAX_SLAVE 8 /* Max Slave Windows */#define TSI148_MAX_DMA 2 /* Max DMA Controllers */#define TSI148_MAX_MAILBOX 4 /* Max Mail Box registers */#define TSI148_MAX_SEMAPHORE 8 /* Max Semaphores *//* Structure used to hold driver specific information */structtsi148_driver{void*base;/* Base Address of device registers */wait_queue_head_tdma_queue[2];wait_queue_head_tiack_queue;void(*lm_callback[4])(int);/* Called in interrupt handler */void*crcsr_kernel;dma_addr_tcrcsr_bus;structvme_master_resource*flush_image;structmutexvme_rmw;/* Only one RMW cycle at a time */structmutexvme_int;/* * Only one VME interrupt can be * generated at a time, provide locking */};/* * Layout of a DMAC Linked-List Descriptor * * Note: This structure is accessed via the chip and therefore must be * correctly laid out - It must also be aligned on 64-bit boundaries. */structtsi148_dma_descriptor{u32dsau;/* Source Address */u32dsal;u32ddau;/* Destination Address */u32ddal;u32dsat;/* Source attributes */u32ddat;/* Destination attributes */u32dnlau;/* Next link address */u32dnlal;u32dcnt;/* Byte count */u32ddbs;/* 2eSST Broadcast select */};structtsi148_dma_entry{/* * The descriptor needs to be aligned on a 64-bit boundary, we increase * the chance of this by putting it first in the structure. */structtsi148_dma_descriptordescriptor;structlist_headlist;};/* * TSI148 ASIC register structure overlays and bit field definitions. * * Note: Tsi148 Register Group (CRG) consi