/* $Id: c4.c,v 1.1.2.2 2004/01/16 21:09:27 keil Exp $
*
* Module for AVM C4 & C2 card.
*
* Copyright 1999 by Carsten Paeth <calle@calle.de>
*
* This software may be used and distributed according to the terms
* of the GNU General Public License, incorporated herein by reference.
*
*/
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/proc_fs.h>
#include <linux/seq_file.h>
#include <linux/skbuff.h>
#include <linux/delay.h>
#include <linux/mm.h>
#include <linux/interrupt.h>
#include <linux/ioport.h>
#include <linux/pci.h>
#include <linux/capi.h>
#include <linux/kernelcapi.h>
#include <linux/init.h>
#include <linux/gfp.h>
#include <asm/io.h>
#include <linux/uaccess.h>
#include <linux/netdevice.h>
#include <linux/isdn/capicmd.h>
#include <linux/isdn/capiutil.h>
#include <linux/isdn/capilli.h>
#include "avmcard.h"
#undef AVM_C4_DEBUG
#undef AVM_C4_POLLDEBUG
/* ------------------------------------------------------------- */
static char *revision = "$Revision: 1.1.2.2 $";
/* ------------------------------------------------------------- */
static bool suppress_pollack;
static const struct pci_device_id c4_pci_tbl[] = {
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_C4, 0, 0, (unsigned long)4 },
{ PCI_VENDOR_ID_DEC, PCI_DEVICE_ID_DEC_21285, PCI_VENDOR_ID_AVM, PCI_DEVICE_ID_AVM_C2, 0, 0, (unsigned long)2 },
{ } /* Terminating entry */
};
MODULE_DEVICE_TABLE(pci, c4_pci_tbl);
MODULE_DESCRIPTION("CAPI4Linux: Driver for AVM C2/C4 cards");
MODULE_AUTHOR("Carsten Paeth");
MODULE_LICENSE("GPL");
module_param(suppress_pollack, bool, 0);
/* ------------------------------------------------------------- */
static void c4_dispatch_tx(avmcard *card);
/* ------------------------------------------------------------- */
#define DC21285_DRAM_A0MR 0x40000000
#define DC21285_DRAM_A1MR 0x40004000
#define DC21285_DRAM_A2MR 0x40008000
#define DC21285_DRAM_A3MR 0x4000C000
#define CAS_OFFSET 0x88
#define DC21285_ARMCSR_BASE 0x42000000
#define PCI_OUT_INT_STATUS 0x30
#define PCI_OUT_INT_MASK 0x34
#define MAILBOX_0 0x50
#define MAILBOX_1 0x54
#define MAILBOX_2 0x58
#define MAILBOX_3 0x5C
#define DOORBELL 0x60
#define DOORBELL_SETUP 0x64
#define CHAN_1_CONTROL 0x90
#define CHAN_2_CONTROL 0xB0
#define DRAM_TIMING 0x10C
#define DRAM_ADDR_SIZE_0 0x110
#define DRAM_ADDR_SIZE_1 0x114
#define DRAM_ADDR_SIZE_2 0x118
#define DRAM_ADDR_SIZE_3 0x11C
#define SA_CONTROL 0x13C
#define XBUS_CYCLE 0x148
#define XBUS_STROBE 0x14C
#define DBELL_PCI_MASK 0x150
#define DBELL_SA_MASK 0x154
#define SDRAM_SIZE 0x1000000
/* ------------------------------------------------------------- */
#define MBOX_PEEK_POKE MAILBOX_0
#define DBELL_ADDR 0x01
#define DBELL_DATA 0x02
#define DBELL_RNWR 0x40
#define DBELL_INIT 0x80
/* ------------------------------------------------------------- */
#define MBOX_UP_ADDR MAILBOX_0
#define MBOX_UP_LEN MAILBOX_1
#define MBOX_DOWN_ADDR MAILBOX_2
#define MBOX_DOWN_LEN MAILBOX_3
#define DBELL_UP_HOST 0x00000100
#define DBELL_UP_ARM 0x00000200
#define DBELL_DOWN_HOST 0x00000400
#define DBELL_DOWN_ARM 0x00000800
#define DBELL_RESET_HOST 0x40000000
#define DBELL_RESET_ARM 0x80000000
/* ------------------------------------------------------------- */
#define DRAM_TIMING_DEF 0x001A01A5
#define DRAM_AD_SZ_DEF0 0x00000045
#define DRAM_AD_SZ_NULL 0x00000000
#define SA_CTL_ALLRIGHT 0x64AA0271
#define INIT_XBUS_CYCLE 0x100016DB
#define INIT_XBUS_STROBE 0xF1F1F1F1
/* ------------------------------------------------------------- */
#define RESET_TIMEOUT (15 * HZ) /* 15 sec */
#define PEEK_POKE_TIMEOUT (HZ / 10) /* 0.1 sec */
/* ------------------------------------------------------------- */
#define c4outmeml(addr, value) writel(value, addr)
#define c4inmeml(addr) readl(addr)
#define c4outmemw(addr, value) writew(value, addr)
#define c4inmemw(addr) readw(addr)
#define c4outmemb(addr, value) writeb(value, addr)
#define c4inmemb(addr) readb(addr)
/* ------------------------------------------------------------- */
static inline int wait_for_doorbell(a