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|
/*
* pmcraid.h -- PMC Sierra MaxRAID controller driver header file
*
* Written By: Anil Ravindranath<anil_ravindranath@pmc-sierra.com>
* PMC-Sierra Inc
*
* Copyright (C) 2008, 2009 PMC Sierra Inc.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*
* You should have received a copy of the GNU General Public License
* along with this program; if not, write to the Free Software
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
*/
#ifndef _PMCRAID_H
#define _PMCRAID_H
#include <linux/types.h>
#include <linux/completion.h>
#include <linux/list.h>
#include <scsi/scsi.h>
#include <scsi/scsi_cmnd.h>
#include <linux/cdev.h>
#include <net/netlink.h>
#include <net/genetlink.h>
#include <linux/connector.h>
/*
* Driver name : string representing the driver name
* Device file : /dev file to be used for management interfaces
* Driver version: version string in major_version.minor_version.patch format
* Driver date : date information in "Mon dd yyyy" format
*/
#define PMCRAID_DRIVER_NAME "PMC MaxRAID"
#define PMCRAID_DEVFILE "pmcsas"
#define PMCRAID_DRIVER_VERSION "1.0.3"
#define PMCRAID_FW_VERSION_1 0x002
/* Maximum number of adapters supported by current version of the driver */
#define PMCRAID_MAX_ADAPTERS 1024
/* Bit definitions as per firmware, bit position [0][1][2].....[31] */
#define PMC_BIT8(n) (1 << (7-n))
#define PMC_BIT16(n) (1 << (15-n))
#define PMC_BIT32(n) (1 << (31-n))
/* PMC PCI vendor ID and device ID values */
#define PCI_VENDOR_ID_PMC 0x11F8
#define PCI_DEVICE_ID_PMC_MAXRAID 0x5220
/*
* MAX_CMD : maximum commands that can be outstanding with IOA
* MAX_IO_CMD : command blocks available for IO commands
* MAX_HCAM_CMD : command blocks avaibale for HCAMS
* MAX_INTERNAL_CMD : command blocks avaible for internal commands like reset
*/
#define PMCRAID_MAX_CMD 1024
#define PMCRAID_MAX_IO_CMD 1020
#define PMCRAID_MAX_HCAM_CMD 2
#define PMCRAID_MAX_INTERNAL_CMD 2
/* MAX_IOADLS : max number of scatter-gather lists supported by IOA
* IOADLS_INTERNAL : number of ioadls included as part of IOARCB.
* IOADLS_EXTERNAL : number of ioadls allocated external to IOARCB
*/
#define PMCRAID_IOADLS_INTERNAL 27
#define PMCRAID_IOADLS_EXTERNAL 37
#define PMCRAID_MAX_IOADLS PMCRAID_IOADLS_INTERNAL
/* HRRQ_ENTRY_SIZE : size of hrrq buffer
* IOARCB_ALIGNMENT : alignment required for IOARCB
* IOADL_ALIGNMENT : alignment requirement for IOADLs
* MSIX_VECTORS : number of MSIX vectors supported
*/
#define HRRQ_ENTRY_SIZE sizeof(__le32)
#define PMCRAID_IOARCB_ALIGNMENT 32
#define PMCRAID_IOADL_ALIGNMENT 16
#define PMCRAID_IOASA_ALIGNMENT 4
#define PMCRAID_NUM_MSIX_VECTORS 16
/* various other limits */
#define PMCRAID_VENDOR_ID_LEN 8
#define PMCRAID_PRODUCT_ID_LEN 16
#define PMCRAID_SERIAL_NUM_LEN 8
#define PMCRAID_LUN_LEN 8
#define PMCRAID_MAX_CDB_LEN 16
#define PMCRAID_DEVICE_ID_LEN 8
#define PMCRAID_SENSE_DATA_LEN 256
#define PMCRAID_ADD_CMD_PARAM_LEN 48
#define PMCRAID_MAX_BUS_TO_SCAN 1
#define PMCRAID_MAX_NUM_TARGETS_PER_BUS 256
#define PMCRAID_MAX_NUM_LUNS_PER_TARGET 8
/* IOA bus/target/lun number of IOA resources */
#define PMCRAID_IOA_BUS_ID 0xfe
#define PMCRAID_IOA_TARGET_ID 0xff
#define PMCRAID_IOA_LUN_ID 0xff
#define PMCRAID_VSET_BUS_ID 0x1
#define PMCRAID_VSET_LUN_ID 0x0
#define PMCRAID_PHYS_BUS_ID 0x0
#define PMCRAID_VIRTUAL_ENCL_BUS_ID 0x8
#define PMCRAID_MAX_VSET_TARGETS 0x7F
#define PMCRAID_MAX_VSET_LUNS_PER_TARGET 8
#define PMCRAID_IOA_MAX_SECTORS 32767
#define PMCRAID_VSET_MAX_SECTORS 512
#define PMCRAID_MAX_CMD_PER_LUN 254
/* Number of configuration table entries (resources), includes 1 FP,
* 1 Enclosure device
*/
#define PMCRAID_MAX_RESOURCES 256
/* Adapter Commands used by driver */
#define PMCRAID_QUERY_RESOURCE_STATE 0xC2
#define PMCRAID_RESET_DEVICE 0xC3
/* options to select reset target */
#define ENABLE_RESET_MODIFIER 0x80
#define RESET_DEVICE_LUN 0x40
#define RESET_DEVICE_TARGET 0x20
#define RESET_DEVICE_BUS 0x10
#define PMCRAID_IDENTIFY_HRRQ 0xC4
#define PMCRAID_QUERY_IOA_CONFIG 0xC5
#define PMCRAID_QUERY_CMD_STATUS 0xCB
#define PMCRAID_ABORT_CMD 0xC7
/* CANCEL ALL command, provides option for setting SYNC_COMPLETE
* on the target resources for which commands got cancelled
*/
#define PMCRAID_CANCEL_ALL_REQUESTS 0xCE
#define PMCRAID_SYNC_COMPLETE_AFTER_CANCEL PMC_BIT8(0)
/* HCAM command and types of HCAM supported by IOA */
#define PMCRAID_HOST_CONTROLLED_ASYNC 0xCF
#define PMCRAID_HCAM_CODE_CONFIG_CHANGE 0x01
#define PMCRAID_HCAM_CODE_LOG_DATA 0x02
/* IOA shutdown command and various shutdown types */
#define PMCRAID_IOA_SHUTDOWN 0xF7
#define PMCRAID_SHUTDOWN_NORMAL 0x00
#define PMCRAID_SHUTDOWN_PREPARE_FOR_NORMAL 0x40
#define PMCRAID_SHUTDOWN_NONE 0x100
#define PMCRAID_SHUTDOWN_ABBREV 0x80
/* SET SUPPORTED DEVICES command and the option to select all the
* devices to be supported
*/
#define PMCRAID_SET_SUPPORTED_DEVICES 0xFB
#define ALL_DEVICES_SUPPORTED PMC_BIT8(0)
/* This option is used with SCSI WRITE_BUFFER command */
#define PMCRAID_WR_BUF_DOWNLOAD_AND_SAVE 0x05
/* IOASC Codes used by driver */
#define PMCRAID_IOASC_SENSE_MASK 0xFFFFFF00
#define PMCRAID_IOASC_SENSE_KEY(ioasc) ((ioasc) >> 24)
#define PMCRAID_IOASC_SENSE_CODE(ioasc) (((ioasc) & 0x00ff0000) >> 16)
#define PMCRAID_IOASC_SENSE_QUAL(ioasc) (((ioasc) & 0x0000ff00) >> 8)
#define PMCRAID_IOASC_SENSE_STATUS(ioasc) ((ioasc) & 0x000000ff)
#define PMCRAID_IOASC_GOOD_COMPLETION 0x00000000
#define PMCRAID_IOASC_GC_IOARCB_NOTFOUND 0x005A0000
#define PMCRAID_IOASC_NR_INIT_CMD_REQUIRED 0x02040200
#define PMCRAID_IOASC_NR_IOA_RESET_REQUIRED 0x02048000
#define PMCRAID_IOASC_NR_SYNC_REQUIRED 0x023F0000
#define PMCRAID_IOASC_ME_READ_ERROR_NO_REALLOC 0x03110C00
#define PMCRAID_IOASC_HW_CANNOT_COMMUNICATE 0x04050000
#define PMCRAID_IOASC_HW_DEVICE_TIMEOUT 0x04080100
#define PMCRAID_IOASC_HW_DEVICE_BUS_STATUS_ERROR 0x04448500
#define PMCRAID_IOASC_HW_IOA_RESET_REQUIRED 0x04448600
#define PMCRAID_IOASC_IR_INVALID_RESOURCE_HANDLE 0x05250000
#define PMCRAID_IOASC_AC_TERMINATED_BY_HOST 0x0B5A0000
#define PMCRAID_IOASC_UA_BUS_WAS_RESET 0x06290000
#define PMCRAID_IOASC_TIME_STAMP_OUT_OF_SYNC 0x06908B00
#define PMCRAID_IOASC_UA_BUS_WAS_RESET_BY_OTHER 0x06298000
/* Driver defined IOASCs */
#define PMCRAID_IOASC_IOA_WAS_RESET 0x10000001
#define PMCRAID_IOASC_PCI_ACCESS_ERROR 0x10000002
/* Various timeout values (in milliseconds) used. If any of these are chip
* specific, move them to pmcraid_chip_details structure.
*/
#define PMCRAID_PCI_DEASSERT_TIMEOUT 2000
#define PMCRAID_BIST_TIMEOUT 2000
#define PMCRAID_AENWAIT_TIMEOUT 5000
#define PMCRAID_TRANSOP_TIMEOUT 60000
#define PMCRAID_RESET_TIMEOUT (2 * HZ)
#define PMCRAID_CHECK_FOR_RESET_TIMEOUT ((HZ / 10))
#define PMCRAID_VSET_IO_TIMEOUT (60 * HZ)
#define PMCRAID_INTERNAL_TIMEOUT (60 * HZ)
#define PMCRAID_SHUTDOWN_TIMEOUT (150 * HZ)
#define PMCRAID_RESET_BUS_TIMEOUT (60 * HZ)
#define PMCRAID_RESET_HOST_TIMEOUT (150 * HZ)
#define PMCRAID_REQUEST_SENSE_TIMEOUT (30 * HZ)
#define PMCRAID_SET_SUP_DEV_TIMEOUT (2 * 60 * HZ)
/* structure to represent a scatter-gather element (IOADL descriptor) */
struct pmcraid_ioadl_desc {
__le64 address;
__le32 data_len;
__u8 reserved[3];
__u8 flags;
} __attribute__((packed, aligned(PMCRAID_IOADL_ALIGNMENT)));
/* pmcraid_ioadl_desc.flags values */
#define IOADL_FLAGS_CHAINED PMC_BIT8(0)
#define IOADL_FLAGS_LAST_DESC PMC_BIT8(1)
#define IOADL_FLAGS_READ_LAST PMC_BIT8(1)
#define IOADL_FLAGS_WRITE_LAST PMC_BIT8(1)
/* additional IOARCB data which can be CDB or additional request parameters
* or list of IOADLs. Firmware supports max of 512 bytes for IOARCB, hence then
* number of IOADLs are limted to 27. In case they are more than 27, they will
* be used in chained form
*/
struct pmcraid_ioarcb_add_data {
union {
struct pmcraid_ioadl_desc ioadl[PMCRAID_IOADLS_INTERNAL];
__u8 add_cmd_params[PMCRAID_ADD_CMD_PARAM_LEN];
} u;
};
/*
* IOA Request Control Block
*/
struct pmcraid_ioarcb {
__le64 ioarcb_bus_addr;
__le32 resource_handle;
__le32 response_handle;
__le64 ioadl_bus_addr;
__le32 ioadl_length;
__le32 data_transfer_length;
__le64 ioasa_bus_addr;
__le16 ioasa_len;
__le16 cmd_timeout;
__le16 add_cmd_param_offset;
__le16 add_cmd_param_length;
__le32 reserved1[2];
__le32 reserved2;
__u8 request_type;
__u8 request_flags0;
__u8 request_flags1;
__u8 hrrq_id;
__u8 cdb[PMCRAID_MAX_CDB_LEN];
struct pmcraid_ioarcb_add_data add_data;
} __attribute__((packed, aligned(PMCRAID_IOARCB_ALIGNMENT)));
/* well known resource handle values */
#define PMCRAID_IOA_RES_HANDLE 0xffffffff
#define PMCRAID_INVALID_RES_HANDLE 0
/* pmcraid_ioarcb.request_type values */
#define REQ_TYPE_SCSI 0x00
#define REQ_TYPE_IOACMD 0x01
#define REQ_TYPE_HCAM 0x02
|