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/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Aic94xx SAS/SATA driver SAS definitions and hardware interface header file.
 *
 * Copyright (C) 2005 Adaptec, Inc.  All rights reserved.
 * Copyright (C) 2005 Luben Tuikov <luben_tuikov@adaptec.com>
 */

#ifndef _AIC94XX_SAS_H_
#define _AIC94XX_SAS_H_

#include <scsi/libsas.h>

/* ---------- DDBs ---------- */
/* DDBs are device descriptor blocks which describe a device in the
 * domain that this sequencer can maintain low-level connections for
 * us.  They are be 64 bytes.
 */
#define ASD_MAX_DDBS	128

struct asd_ddb_ssp_smp_target_port {
	u8     conn_type;	  /* byte 0 */
#define DDB_TP_CONN_TYPE 0x81	  /* Initiator port and addr frame type 0x01 */

	u8     conn_rate;
	__be16 init_conn_tag;
	u8     dest_sas_addr[8];  /* bytes 4-11 */

	__le16 send_queue_head;
	u8     sq_suspended;
	u8     ddb_type;	  /* DDB_TYPE_TARGET */
#define DDB_TYPE_UNUSED    0xFF
#define DDB_TYPE_TARGET    0xFE
#define DDB_TYPE_INITIATOR 0xFD
#define DDB_TYPE_PM_PORT   0xFC

	__le16 _r_a;
	__be16 awt_def;

	u8     compat_features;	  /* byte 20 */
	u8     pathway_blocked_count;
	__be16 arb_wait_time;
	__be32 more_compat_features; /* byte 24 */

	u8     conn_mask;
	u8     flags;	  /* concurrent conn:2,2 and open:0(1) */
#define CONCURRENT_CONN_SUPP 0x04
#define OPEN_REQUIRED        0x01

	u16    _r_b;
	__le16 exec_queue_tail;
	__le16 send_queue_tail;
	__le16 sister_ddb;

	__le16 _r_c;

	u8     max_concurrent_conn;
	u8     num_concurrent_conn;
	u8     num_contexts;

	u8     _r_d;

	__le16 active_task_count;

	u8     _r_e[9];

	u8     itnl_reason;	  /* I_T nexus loss reason */

	__le16 _r_f;

	__le16 itnl_timeout;
#define ITNL_TIMEOUT_CONST 0x7D0 /* 2 seconds */

	__le32 itnl_timestamp;
} __attribute__ ((packed));

struct asd_ddb_stp_sata_target_port {
	u8     conn_type;	  /* byte 0 */
	u8     conn_rate;
	__be16 init_conn_tag;
	u8     dest_sas_addr[8];  /* bytes 4-11 */

	__le16 send_queue_head;
	u8     sq_suspended;
	u8     ddb_type;	  /* DDB_TYPE_TARGET */

	__le16 _r_a;

	__be16 awt_def;
	u8     compat_features;	  /* byte 20 */
	u8     pathway_blocked_count;
	__be16 arb_wait_time;
	__be32 more_compat_features; /* byte 24 */

	u8     conn_mask;
	u8     flags;	  /* concurrent conn:2,2 and open:0(1) */
#define SATA_MULTIPORT     0x80
#define SUPPORTS_AFFIL     0x40
#define STP_AFFIL_POL      0x20

	u8     _r_b;
	u8     flags2;		  /* STP close policy:0 */
#define STP_CL_POL_NO_TX    0x00
#define STP_CL_POL_BTW_CMDS 0x01

	__le16 exec_queue_tail;
	__le16 send_queue_tail;
	__le16 sister_ddb;
	__le16 ata_cmd_scbptr;
	__le32 sata_tag_alloc_mask;
	__le16 active_task_count;
	__le16 _r_c;
	__le32 sata_sactive;
	u8     num_sata_tags;
	u8     sata_status;
	u8     sata_ending_status;
	u8     itnl_reason;	  /* I_T nexus loss reason */
	__le16 ncq_data_scb_ptr;
	__le16 itnl_timeout;
	__le32 itnl_timestamp;
} __attribute__ ((packed));

/* This struct asd_ddb_init_port, describes the device descriptor block
 * of an initiator port (when the sequencer is operating in target mode).
 * Bytes [0,11] and [20,27] are from the OPEN address frame.
 * The sequencer allocates an initiator port DDB entry.
 */
struct asd_ddb_init_port {
	u8     conn_type;	  /* byte 0 */
	u8     conn_rate;
	__be16 init_conn_tag;     /* BE */
	u8     dest_sas_addr[8];
	__le16 send_queue_head;   /* LE, byte 12 */
	u8     sq_suspended;
	u8     ddb_type;	  /* DDB_TYPE_INITIATOR */
	__le16 _r_a;
	__be16 awt_def;		  /* BE */
	u8     compat_features;
	u8     pathway_blocked_count;
	__be16 arb_wait_time;	  /* BE */
	__be32 more_compat_features; /* BE */
	u8     conn_mask;
	u8     flags;		  /* == 5 */
	u16    _r_b;
	__le16 exec_queue_tail;	  /* execution queue tail */
	__le16 send_queue_tail;
	__le16 sister_ddb;
	__le16 init_resp_timeout; /* initiator response timeout */
	__le32 _r_c;
	__le16 active_tasks;	  /* active task count */
	__le16 init_list;	  /* initiator list link pointer */
	__le32 _r_d;
	u8     max_conn_to[3]; /* from Conn-Disc mode page, in us, LE */
	u8     itnl_reason;	  /* I_T nexus loss reason */
	__le16 bus_inact_to; /* from Conn-Disc mode page, in 100 us, LE */
	__le16 itnl_to;		  /* from the Protocol Specific Port Ctrl MP */
	__le32 itnl_timestamp;
} __attribute__ ((packed));

/* This struct asd_ddb_sata_tag, describes a look-up table to be used
 * by the sequencers.  SATA II, IDENTIFY DEVICE data, word 76, bit 8:
 * NCQ support.  This table is used by the sequencers to find the
 * corresponding SCB, given a SATA II tag value.
 */
struct asd_ddb_sata_tag {
	__le16 scb_pointer[32];
} __attribute__ ((packed));

/* This struct asd_ddb_sata_pm_table, describes a port number to
 * connection handle look-up table.  SATA targets attached to a port
 * multiplier require a 4-bit port number value.  There is one DDB
 * entry of this type for each SATA port multiplier (sister DDB).
 * Given a SATA PM port number, this table gives us the SATA PM Port
 * DDB of the SATA port multiplier port (i.e. the SATA target
 * discovered on the port).
 */
struct asd_ddb_sata_pm_table {
	__le16 ddb_pointer[16];
	__le16 _r_a[16];
} __attribute__ ((packed));

/* This struct asd_ddb_sata_pm_port, describes the SATA port multiplier
 * port format DDB.
 */
struct asd_ddb_sata_pm_port {
	u8     _r_a[15];
	u8     ddb_type;
	u8     _r_b[13];
	u8     pm_port_flags;
#define PM_PORT_MASK  0xF0
#define PM_PORT_SET   0x02
	u8     _r_c[6];
	__le16 sister_ddb;
	__le16 ata_cmd_scbptr;
	__le32 sata_tag_alloc_mask;
	__le16 active_task_count;
	__le16 parent_ddb;
	__le32 sata_sactive;
	u8     num_sata_tags;
	u8     sata_status;
	u8     sata_ending_status;
	u8     _r_d[9];
} __attribute__ ((packed));

/* This struct asd_ddb_seq_shared, describes a DDB shared by the
 * central and link sequencers.  port_map_by_links is indexed phy
 * number [0,7]; each byte is a bit mask of all the phys that are in
 * the same port as the indexed phy.
 */
struct asd_ddb_seq_shared {
	__le16 q_free_ddb_head;
	__le16 q_free_ddb_tail;
	__le16 q_free_ddb_cnt;
	__le16 q_used_ddb_head;
	__le16 q_used_ddb_tail;
	__le16 shared_mem_lock;
	__le16 smp_conn_tag;
	__le16 est_nexus_buf_cnt;
	__le16 est_nexus_buf_thresh;
	u32    _r_a;
	u8     settable_max_contexts;
	u8     _r_b[23];
	u8     conn_not_active;
	u8     phy_is_up;
	u8     _r_c[8];
	u8     port_map_by_links[8];
} __attribute__ ((packed));

/* ---------- SG Element ---------- */

/* This struct sg_el, describes the hardware scatter gather buffer
 * element.  All entries are little endian.  In an SCB, there are 2 of
 * this, plus one more, called a link element of this indicating a
 * sublist if needed.
 *
 * A link element has only the bus address set and the flags (DS) bit
 * valid.  The bus address points to the start of the sublist.
 *
 * If a sublist is needed, then that sublist should also include the 2
 * sg_el embedded in the SCB, in which case next_sg_offset is 32,
 * since sizeof(sg_el) = 16; EOS should be 1 and EOL 0 in this case.
 */
struct sg_el {
	__le64 bus_addr;
	__le32 size;
	__le16 _r;
	u8     next_sg_offs;
	u8     flags;
#define ASD_SG_EL_DS_MASK   0x30
#define ASD_SG_EL_DS_OCM    0x10
#define ASD_SG_EL_DS_HM     0x00
#define ASD_SG_EL_LIST_MASK 0xC0
#define ASD_SG_EL_LIST_EOL  0x40
#define ASD_SG_EL_LIST_EOS  0x80
} __attribute__ ((packed));

/* ---------- SCBs ---------- */

/* An SCB (sequencer control block) is comprised of a common header
 * and a task part, for a total of 128 bytes.  All fields are in LE
 * order, unless otherwise noted.
 */

/* This struct scb_header, defines the SCB header format.
 */
struct scb_header {
	__le64 next_scb;
	__le16 index;		  /* transaction context */
	u8     opcode;
} __attribute__ ((packed));

/* SCB opcodes: Execution queue
 */
#define INITIATE_SSP_TASK       0x00
#define INITIATE_LONG_SSP_TASK  0x01
#define INITIATE_BIDIR_SSP_TASK 0x02
#define SCB_ABORT_TASK          0x03
#define INITIATE_SSP_TMF        0x04
#define SSP_TARG_GET_DATA       0x05
#define SSP_TARG_GET_DATA_GOOD  0x06
#define SSP_TARG_SEND_RESP      0x07
#define QUERY_SSP_TASK          0x08
#define INITIATE_ATA_TASK       0x09
#define INITIATE_ATAPI_TASK     0x0a
#define CONTROL_ATA_DEV         0x0b
#define INITIATE_SMP_TASK       0x0c
#define SMP_TARG_SEND_RESP      0x0f

/* SCB opcodes: Send Queue
 */
#define SSP_TARG_SEND_DATA      0x40
#define SSP_TARG_SEND_DATA_GOOD 0x41

/* SCB opcodes: Link Queue
 */
#define CONTROL_PHY             0x80
#define SEND_PRIMITIVE          0x81
#define INITIATE_LINK_ADM_TASK  0x82

/* SCB opcodes: other
 */
#define EMPTY_SCB               0xc0
#define INITIATE_SEQ_ADM_TASK   0xc1
#define EST_ICL_TARG_WINDOW     0xc2
#define COPY_MEM                0xc3
#define CLEAR_NEXUS             0xc4
#define INITIATE_DDB_ADM_TASK   0xc6
#define ESTABLISH_NEXUS_ESCB    0xd0

#define LUN_SIZE                8

#define EFB_MASK                0x80
#define TASK_PRIO_MASK          0x78
#define TASK_ATTR_MASK          0x07
/* ---------- SCB tasks ---------- */

/* This is both ssp_task and long_ssp_task
 */
struct initiate_ssp_task {
	u8     proto_conn_rate;	  /* proto:6,4, conn_rate:3,0 */
	__le32 total_xfer_len;