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/*
* Copyright 2004-2008 Freescale Semiconductor, Inc. All Rights Reserved.
*
* The code contained herein is licensed under the GNU General Public
* License. You may obtain a copy of the GNU General Public License
* Version 2 or later at the following locations:
*
* http://www.opensource.org/licenses/gpl-license.html
* http://www.gnu.org/copyleft/gpl.html
*/
#include <linux/io.h>
#include <linux/rtc.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/clk.h>
#define RTC_INPUT_CLK_32768HZ (0x00 << 5)
#define RTC_INPUT_CLK_32000HZ (0x01 << 5)
#define RTC_INPUT_CLK_38400HZ (0x02 << 5)
#define RTC_SW_BIT (1 << 0)
#define RTC_ALM_BIT (1 << 2)
#define RTC_1HZ_BIT (1 << 4)
#define RTC_2HZ_BIT (1 << 7)
#define RTC_SAM0_BIT (1 << 8)
#define RTC_SAM1_BIT (1 << 9)
#define RTC_SAM2_BIT (1 << 10)
#define RTC_SAM3_BIT (1 << 11)
#define RTC_SAM4_BIT (1 << 12)
#define RTC_SAM5_BIT (1 << 13)
#define RTC_SAM6_BIT (1 << 14)
#define RTC_SAM7_BIT (1 << 15)
#define PIT_ALL_ON (RTC_2HZ_BIT | RTC_SAM0_BIT | RTC_SAM1_BIT | \
RTC_SAM2_BIT | RTC_SAM3_BIT | RTC_SAM4_BIT | \
RTC_SAM5_BIT | RTC_SAM6_BIT | RTC_SAM7_BIT)
#define RTC_ENABLE_BIT (1 << 7)
#define MAX_PIE_NUM 9
#define MAX_PIE_FREQ 512
static const u32 PIE_BIT_DEF[MAX_PIE_NUM][2] = {
{ 2, RTC_2HZ_BIT },
{ 4, RTC_SAM0_BIT },
{ 8, RTC_SAM1_BIT },
{ 16, RTC_SAM2_BIT },
{ 32, RTC_SAM3_BIT },
{ 64, RTC_SAM4_BIT },
{ 128, RTC_SAM5_BIT },
{ 256, RTC_SAM6_BIT },
{ MAX_PIE_FREQ, RTC_SAM7_BIT },
};
#define MXC_RTC_TIME 0
#define MXC_RTC_ALARM 1
#define RTC_HOURMIN 0x00 /* 32bit rtc hour/min counter reg */
#define RTC_SECOND 0x04 /* 32bit rtc seconds counter reg */
#define RTC_ALRM_HM 0x08 /* 32bit rtc alarm hour/min reg */
#define RTC_ALRM_SEC 0x0C /* 32bit rtc alarm seconds reg */
#define RTC_RTCCTL 0x10 /* 32bit rtc control reg */
#define RTC_RTCISR 0x14 /* 32bit rtc interrupt status reg */
#define RTC_RTCIENR 0x18 /* 32bit rtc interrupt enable reg */
#define RTC_STPWCH 0x1C /* 32bit rtc stopwatch min reg */
#define RTC_DAYR 0x20 /* 32bit rtc days counter reg */
#define RTC_DAYALARM 0x24 /* 32bit rtc day alarm reg */
#define RTC_TEST1 0x28 /* 32bit rtc test reg 1 */
#define RTC_TEST2 0x2C /* 32bit rtc test reg 2 */
#define RTC_TEST3 0x30 /* 32bit rtc test reg 3 */
enum imx_rtc_type {
IMX1_RTC,
IMX21_RTC,
};
struct rtc_plat_data {
struct rtc_device *rtc;
void __iomem *ioaddr;
int irq;
struct clk *clk;
struct rtc_time g_rtc_alarm;
enum imx_rtc_type devtype;
};
static struct platform_device_id imx_rtc_devtype[] = {
{
.name = "imx1-rtc",
.driver_data = IMX1_RTC,
}, {
.name = "imx21-rtc",
.driver_data = IMX21_RTC,
}, {
/* sentinel */
}
};
MODULE_DEVICE_TABLE(platform, imx_rtc_devtype);
static inline int is_imx1_rtc(struct rtc_plat_data *data)
{
return data->devtype == IMX1_RTC;
}
/*
* This function is used to obtain the RTC time or the alarm value in
* second.
*/
static u32 get_alarm_or_time(struct device *dev, int time_alarm)
{
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
u32 day = 0, hr = 0, min = 0, sec = 0, hr_min = 0;
switch (time_alarm) {
case MXC_RTC_TIME:
day = readw(ioaddr + RTC_DAYR);
hr_min = readw(ioaddr + RTC_HOURMIN);
sec = readw(ioaddr + RTC_SECOND);
break;
case MXC_RTC_ALARM:
day = readw(ioaddr + RTC_DAYALARM);
hr_min = readw(ioaddr + RTC_ALRM_HM) & 0xffff;
sec = readw(ioaddr + RTC_ALRM_SEC);
break;
}
hr = hr_min >> 8;
min = hr_min & 0xff;
return (((day * 24 + hr) * 60) + min) * 60 + sec;
}
/*
* This function sets the RTC alarm value or the time value.
*/
static void set_alarm_or_time(struct device *dev, int time_alarm, u32 time)
{
u32 day, hr, min, sec, temp;
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
day = time / 86400;
time -= day * 86400;
/* time is within a day now */
hr = time / 3600;
time -= hr * 3600;
/* time is within an hour now */
min = time / 60;
sec = time - min * 60;
temp = (hr << 8) + min;
switch (time_alarm) {
case MXC_RTC_TIME:
writew(day, ioaddr + RTC_DAYR);
writew(sec, ioaddr + RTC_SECOND);
writew(temp, ioaddr + RTC_HOURMIN);
break;
case MXC_RTC_ALARM:
writew(day, ioaddr + RTC_DAYALARM);
writew(sec, ioaddr + RTC_ALRM_SEC);
writew(temp, ioaddr + RTC_ALRM_HM);
break;
}
}
/*
* This function updates the RTC alarm registers and then clears all the
* interrupt status bits.
*/
static int rtc_update_alarm(struct device *dev, struct rtc_time *alrm)
{
struct rtc_time alarm_tm, now_tm;
unsigned long now, time;
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
now = get_alarm_or_time(dev, MXC_RTC_TIME);
rtc_time_to_tm(now, &now_tm);
alarm_tm.tm_year = now_tm.tm_year;
alarm_tm.tm_mon = now_tm.tm_mon;
alarm_tm.tm_mday = now_tm.tm_mday;
alarm_tm.tm_hour = alrm->tm_hour;
alarm_tm.tm_min = alrm->tm_min;
alarm_tm.tm_sec = alrm->tm_sec;
rtc_tm_to_time(&alarm_tm, &time);
/* clear all the interrupt status bits */
writew(readw(ioaddr + RTC_RTCISR), ioaddr + RTC_RTCISR);
set_alarm_or_time(dev, MXC_RTC_ALARM, time);
return 0;
}
static void mxc_rtc_irq_enable(struct device *dev, unsigned int bit,
unsigned int enabled)
{
struct platform_device *pdev = to_platform_device(dev);
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
u32 reg;
spin_lock_irq(&pdata->rtc->irq_lock);
reg = readw(ioaddr + RTC_RTCIENR);
if (enabled)
reg |= bit;
else
reg &= ~bit;
writew(reg, ioaddr + RTC_RTCIENR);
spin_unlock_irq(&pdata->rtc->irq_lock);
}
/* This function is the RTC interrupt service routine. */
static irqreturn_t mxc_rtc_interrupt(int irq, void *dev_id)
{
struct platform_device *pdev = dev_id;
struct rtc_plat_data *pdata = platform_get_drvdata(pdev);
void __iomem *ioaddr = pdata->ioaddr;
unsigned long flags;
u32 status;
u32 events = 0;
spin_lock_irqsave(&pdata->rtc->irq_lock, flags);
status = readw(ioaddr + RTC_RTCISR) & readw(ioaddr + RTC_RTCIENR);
/* clear interrupt sources */
writew(status, ioaddr + RTC_RTCISR);
/* update irq data & counter */
if (status & RTC_ALM_BIT) {
events |= (RTC_AF | RTC_IRQF);
/* RTC alarm should be one-shot */
mxc_rtc_irq_enable(&pdev->dev, RTC_ALM_BIT, 0);
}
if (status & RTC_1HZ_BIT)
events |= (RTC_UF | RTC_IRQF);
if (
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