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|
/*
* Regulator Driver for Freescale MC13892 PMIC
*
* Copyright 2010 Yong Shen <yong.shen@linaro.org>
*
* Based on draft driver from Arnaud Patard <arnaud.patard@rtp-net.org>
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/mfd/mc13892.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/driver.h>
#include <linux/platform_device.h>
#include <linux/kernel.h>
#include <linux/slab.h>
#include <linux/init.h>
#include <linux/err.h>
#include <linux/module.h>
#include "mc13xxx.h"
#define MC13892_REVISION 7
#define MC13892_POWERCTL0 13
#define MC13892_POWERCTL0_USEROFFSPI 3
#define MC13892_POWERCTL0_VCOINCELLVSEL 20
#define MC13892_POWERCTL0_VCOINCELLVSEL_M (7<<20)
#define MC13892_POWERCTL0_VCOINCELLEN (1<<23)
#define MC13892_SWITCHERS0_SWxHI (1<<23)
#define MC13892_SWITCHERS0 24
#define MC13892_SWITCHERS0_SW1VSEL 0
#define MC13892_SWITCHERS0_SW1VSEL_M (0x1f<<0)
#define MC13892_SWITCHERS0_SW1HI (1<<23)
#define MC13892_SWITCHERS0_SW1EN 0
#define MC13892_SWITCHERS1 25
#define MC13892_SWITCHERS1_SW2VSEL 0
#define MC13892_SWITCHERS1_SW2VSEL_M (0x1f<<0)
#define MC13892_SWITCHERS1_SW2HI (1<<23)
#define MC13892_SWITCHERS1_SW2EN 0
#define MC13892_SWITCHERS2 26
#define MC13892_SWITCHERS2_SW3VSEL 0
#define MC13892_SWITCHERS2_SW3VSEL_M (0x1f<<0)
#define MC13892_SWITCHERS2_SW3HI (1<<23)
#define MC13892_SWITCHERS2_SW3EN 0
#define MC13892_SWITCHERS3 27
#define MC13892_SWITCHERS3_SW4VSEL 0
#define MC13892_SWITCHERS3_SW4VSEL_M (0x1f<<0)
#define MC13892_SWITCHERS3_SW4HI (1<<23)
#define MC13892_SWITCHERS3_SW4EN 0
#define MC13892_SWITCHERS4 28
#define MC13892_SWITCHERS4_SW1MODE 0
#define MC13892_SWITCHERS4_SW1MODE_AUTO (8<<0)
#define MC13892_SWITCHERS4_SW1MODE_M (0xf<<0)
#define MC13892_SWITCHERS4_SW2MODE 10
#define MC13892_SWITCHERS4_SW2MODE_AUTO (8<<10)
#define MC13892_SWITCHERS4_SW2MODE_M (0xf<<10)
#define MC13892_SWITCHERS5 29
#define MC13892_SWITCHERS5_SW3MODE 0
#define MC13892_SWITCHERS5_SW3MODE_AUTO (8<<0)
#define MC13892_SWITCHERS5_SW3MODE_M (0xf<<0)
#define MC13892_SWITCHERS5_SW4MODE 8
#define MC13892_SWITCHERS5_SW4MODE_AUTO (8<<8)
#define MC13892_SWITCHERS5_SW4MODE_M (0xf<<8)
#define MC13892_SWITCHERS5_SWBSTEN (1<<20)
#define MC13892_REGULATORSETTING0 30
#define MC13892_REGULATORSETTING0_VGEN1VSEL 0
#define MC13892_REGULATORSETTING0_VDIGVSEL 4
#define MC13892_REGULATORSETTING0_VGEN2VSEL 6
#define MC13892_REGULATORSETTING0_VPLLVSEL 9
#define MC13892_REGULATORSETTING0_VUSB2VSEL 11
#define MC13892_REGULATORSETTING0_VGEN3VSEL 14
#define MC13892_REGULATORSETTING0_VCAMVSEL 16
#define MC13892_REGULATORSETTING0_VGEN1VSEL_M (3<<0)
#define MC13892_REGULATORSETTING0_VDIGVSEL_M (3<<4)
#define MC13892_REGULATORSETTING0_VGEN2VSEL_M (7<<6)
#define MC13892_REGULATORSETTING0_VPLLVSEL_M (3<<9)
#define MC13892_REGULATORSETTING0_VUSB2VSEL_M (3<<11)
#define MC13892_REGULATORSETTING0_VGEN3VSEL_M (1<<14)
#define MC13892_REGULATORSETTING0_VCAMVSEL_M (3<<16)
#define MC13892_REGULATORSETTING1 31
#define MC13892_REGULATORSETTING1_VVIDEOVSEL 2
#define MC13892_REGULATORSETTING1_VAUDIOVSEL 4
#define MC13892_REGULATORSETTING1_VSDVSEL 6
#define MC13892_REGULATORSETTING1_VVIDEOVSEL_M (3<<2)
#define MC13892_REGULATORSETTING1_VAUDIOVSEL_M (3<<4)
#define MC13892_REGULATORSETTING1_VSDVSEL_M (7<<6)
#define MC13892_REGULATORMODE0 32
#define MC13892_REGULATORMODE0_VGEN1EN (1<<0)
#define MC13892_REGULATORMODE0_VGEN1STDBY (1<<1)
#define MC13892_REGULATORMODE0_VGEN1MODE (1<<2)
#define MC13892_REGULATORMODE0_VIOHIEN (1<<3)
#define MC13892_REGULATORMODE0_VIOHISTDBY (1<<4)
#define MC13892_REGULATORMODE0_VIOHIMODE (1<<5)
#define MC13892_REGULATORMODE0_VDIGEN (1<<9)
#define MC13892_REGULATORMODE0_VDIGSTDBY (1<<10)
#define MC13892_REGULATORMODE0_VDIGMODE (1<<11)
#define MC13892_REGULATORMODE0_VGEN2EN (1<<12)
#define MC13892_REGULATORMODE0_VGEN2STDBY (1<<13)
#define MC13892_REGULATORMODE0_VGEN2MODE (1<<14)
#define MC13892_REGULATORMODE0_VPLLEN (1<<15)
#define MC13892_REGULATORMODE0_VPLLSTDBY (1<<16)
#define MC13892_REGULATORMODE0_VPLLMODE (1<<17)
#define MC13892_REGULATORMODE0_VUSB2EN (1<<18)
#define MC13892_REGULATORMODE0_VUSB2STDBY (1<<19)
#define MC13892_REGULATORMODE0_VUSB2MODE (1<<20)
#define MC13892_REGULATORMODE1 33
#define MC13892_REGULATORMODE1_VGEN3EN (1<<0)
#define MC13892_REGULATORMODE1_VGEN3STDBY (1<<1)
#define MC13892_REGULATORMODE1_VGEN3MODE (1<<2)
#define MC13892_REGULATORMODE1_VCAMEN (1<<6)
#define MC13892_REGULATORMODE1_VCAMSTDBY (1<<7)
#define MC13892_REGULATORMODE1_VCAMMODE (1<<8)
#define MC13892_REGULATORMODE1_VCAMCONFIGEN (1<<9)
#define MC13892_REGULATORMODE1_VVIDEOEN (1<<12)
#define MC13892_REGULATORMODE1_VVIDEOSTDBY (1<<13)
#define MC13892_REGULATORMODE1_VVIDEOMODE (1<<14)
#define MC13892_REGULATORMODE1_VAUDIOEN (1<<15)
#define MC13892_REGULATORMODE1_VAUDIOSTDBY (1<<16)
#define MC13892_REGULATORMODE1_VAUDIOMODE (1<<17)
#define MC13892_REGULATORMODE1_VSDEN (1<<18)
#define MC13892_REGULATORMODE1_VSDSTDBY (1<<19)
#define MC13892_REGULATORMODE1_VSDMODE (1<<20)
#define MC13892_POWERMISC 34
#define MC13892_POWERMISC_GPO1EN (1<<6)
#define MC13892_POWERMISC_GPO2EN (1<<8)
#define MC13892_POWERMISC_GPO3EN (1<<10)
#define MC13892_POWERMISC_GPO4EN (1<<12)
#define MC13892_POWERMISC_PWGT1SPIEN (1<<15)
#define MC13892_POWERMISC_PWGT2SPIEN (1<<16)
#define MC13892_POWERMISC_GPO4ADINEN (1<<21)
#define MC13892_POWERMISC_PWGTSPI_M (3 << 15)
#define MC13892_USB1 50
#define MC13892_USB1_VUSBEN (1<<3)
static const unsigned int mc13892_vcoincell[] = {
2500000, 2700000, 2800000, 2900000, 3000000, 3100000,
3200000, 3300000,
};
static const unsigned int mc13892_sw1[] = {
600000, 625000, 650000, 675000, 700000, 725000,
750000, 775000, 800000, 825000, 850000, 875000,
900000, 925000, 950000, 975000, 1000000, 1025000,
1050000, 1075000, 1100000, 1125000, 1150000, 1175000,
1200000, 1225000, 1250000, 1275000, 1300000, 1325000,
1350000, 1375000
};
/*
* Note: this table is used to derive SWxVSEL by index into
* the array. Offset the values by the index of 1100000uV
* to get the actual register value for that voltage selector
* if the HI bit is to be set as well.
*/
#define MC13892_SWxHI_SEL_OFFSET 20
static const unsigned int mc13892_sw[] = {
600000, 625000, 650000, 675000, 700000, 725000,
750000, 775000, 800000, 825000, 850000, 875000,
900000, 925000, 950000, 975000, 1000000, 1025000,
1050000, 1075000, 1100000, 1125000, 1150000, 1175000,
1200000, 1225000, 1250000, 1275000, 1300000, 1325000,
1350000, 1375000, 1400000, 1425000, 1450000, 1475000,
1500000, 1525000, 1550000, 1575000, 1600000, 1625000,
1650000, 1675000, 1700000, 1725000, 1750000, 1775000,
1800000, 1825000, 1850000, 1875000
};
static const unsigned int mc13892_swbst[] = {
5000000,
};
static const unsigned int mc13892_viohi[] = {
2775000,
};
static const unsigned int mc13892_vpll[] = {
1050000, 1250000, 1650000, 1800000,
};
static const unsigned int mc13892_vdig[] = {
1050000, 1250000, 1650000, 1800000,
};
static const unsigned int mc13892_vsd[] = {
1800000, 2000000, 2600000, 2700000,
2800000, 2900000, 3000000, 3150000,
};
static const unsigned int mc13892_vusb2[] = {
2400000, 2600000, 2700000, 2775000,
};
static const unsigned int mc13892_vvideo[] = {
2700000, 2775000, 2500000, 2600000,
};
static const unsigned int mc13892_vaudio[] = {
2300000, 2500000, 2775000, 3000000,
};
static const unsigned int mc13892_vcam[] = {
2500000, 2600000, 2750000, 3000000,
};
static const unsigned int mc13892_vgen1[] = {
1200000, 1500000, 2775000, 3150000,
};
static const unsigned int mc13892_vgen2[] = {
1200000, 1500000, 1600000, 1800000,
2700000, 2800000, 3000000, 3150000,
};
static const unsigned int mc13892_vgen3[] = {
1800000, 2900000,
};
static const unsigned int mc13892_vusb[] = {
3300000,
};
static const unsigned int mc13892_gpo[] = {
2750000,
};
static const unsigned int mc13892_pwgtdrv[] = {
5000000,
};
static struct regulator_ops mc13892_gpo_regulator_ops;
static struct regulator_ops mc13892_sw_regulator_ops;
#define MC13892_FIXED_DEFINE(name, reg, voltages) \
MC13xxx_FIXED_DEFINE(MC13892_, name, reg, voltages, \
mc13xxx_fixed_regulator_ops)
#define MC13892_GPO_DEFINE(name, reg, voltages) \
MC13xxx_GPO_DEFINE(MC13892_, name, reg, voltages, \
mc13892_gpo_regulator_ops)
#define MC13892_SW_DEFINE(name, reg, vsel_reg, voltages) \
MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \
mc13892_sw_regulator_ops)
#define MC13892_DEFINE_REGU(name, reg, vsel_reg, voltages) \
MC13xxx_DEFINE(MC13892_, name, reg, vsel_reg, voltages, \
mc13xxx_regulator_ops)
static struct mc13xxx_regulator mc13892_regulators[] = {
MC13892_DEFINE_REGU(VCOINCELL, POWERCTL0, POWERCTL0, mc13892_vcoincell),
MC13892_SW_DEFINE(SW1, SWITCHERS0, SWITCHERS0, mc13892_sw1),
MC13892_SW_DEFINE(SW2, SWITCHERS1, SWITCHERS1, mc13892_sw),
MC13892_SW_DEFINE(SW3, SWITCHERS2, SWITCHERS2, mc13892_sw),
MC13892_SW_DEFINE(SW4, SWITCHERS3, SWITCHERS3, mc13892_sw),
MC13892_FIXED_DEFINE(SWBST, SWITCHERS5, mc13892_swbst),
MC13892_FIXED_DEFINE(VIOHI, REGULATORMODE0, mc13892_viohi),
MC13892_DEFINE_REGU(VPLL, REGULATORMODE0, REGULATORSETTING0, \
mc13892_vpll),
MC13892_DEFINE_REGU(VDIG, REGULATORMODE0, REGULATORSETTING0, \
mc13892_vdig),
MC13892_DEFINE_REGU(VSD, REGULATORMODE1, REGULATORSETTING1, \
|