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/*
* Motorola CPCAP PMIC regulator driver
*
* Based on cpcap-regulator.c from Motorola Linux kernel tree
* Copyright (C) 2009-2011 Motorola, Inc.
*
* Rewritten for mainline kernel to use device tree and regmap
* Copyright (C) 2017 Tony Lindgren <tony@atomide.com>
*
* This program is free software; you can redistribute it and/or
* modify it under the terms of the GNU General Public License as
* published by the Free Software Foundation version 2.
*
* This program is distributed "as is" WITHOUT ANY WARRANTY of any
* kind, whether express or implied; without even the implied warranty
* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/err.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/of_regulator.h>
#include <linux/mfd/motorola-cpcap.h>
/*
* Resource assignment register bits. These seem to control the state
* idle modes adn are used at least for omap4.
*/
/* CPCAP_REG_ASSIGN2 bits - Resource Assignment 2 */
#define CPCAP_BIT_VSDIO_SEL BIT(15)
#define CPCAP_BIT_VDIG_SEL BIT(14)
#define CPCAP_BIT_VCAM_SEL BIT(13)
#define CPCAP_BIT_SW6_SEL BIT(12)
#define CPCAP_BIT_SW5_SEL BIT(11)
#define CPCAP_BIT_SW4_SEL BIT(10)
#define CPCAP_BIT_SW3_SEL BIT(9)
#define CPCAP_BIT_SW2_SEL BIT(8)
#define CPCAP_BIT_SW1_SEL BIT(7)
/* CPCAP_REG_ASSIGN3 bits - Resource Assignment 3 */
#define CPCAP_BIT_VUSBINT2_SEL BIT(15)
#define CPCAP_BIT_VUSBINT1_SEL BIT(14)
#define CPCAP_BIT_VVIB_SEL BIT(13)
#define CPCAP_BIT_VWLAN1_SEL BIT(12)
#define CPCAP_BIT_VRF1_SEL BIT(11)
#define CPCAP_BIT_VHVIO_SEL BIT(10)
#define CPCAP_BIT_VDAC_SEL BIT(9)
#define CPCAP_BIT_VUSB_SEL BIT(8)
#define CPCAP_BIT_VSIM_SEL BIT(7)
#define CPCAP_BIT_VRFREF_SEL BIT(6)
#define CPCAP_BIT_VPLL_SEL BIT(5)
#define CPCAP_BIT_VFUSE_SEL BIT(4)
#define CPCAP_BIT_VCSI_SEL BIT(3)
#define CPCAP_BIT_SPARE_14_2 BIT(2)
#define CPCAP_BIT_VWLAN2_SEL BIT(1)
#define CPCAP_BIT_VRF2_SEL BIT(0)
/* CPCAP_REG_ASSIGN4 bits - Resource Assignment 4 */
#define CPCAP_BIT_VAUDIO_SEL BIT(0)
/*
* Enable register bits. At least CPCAP_BIT_AUDIO_LOW_PWR is generic,
* and not limited to audio regulator. Let's use the Motorola kernel
* naming for now until we have a better understanding of the other
* enable register bits. No idea why BIT(3) is not defined.
*/
#define CPCAP_BIT_AUDIO_LOW_PWR BIT(6)
#define CPCAP_BIT_AUD_LOWPWR_SPEED BIT(5)
#define CPCAP_BIT_VAUDIOPRISTBY BIT(4)
#define CPCAP_BIT_VAUDIO_MODE1 BIT(2)
#define CPCAP_BIT_VAUDIO_MODE0 BIT(1)
#define CPCAP_BIT_V_AUDIO_EN BIT(0)
#define CPCAP_BIT_AUDIO_NORMAL_MODE 0x00
/*
* Off mode configuration bit. Used currently only by SW5 on omap4. There's
* the following comment in Motorola Linux kernel tree for it:
*
* When set in the regulator mode, the regulator assignment will be changed
* to secondary when the regulator is disabled. The mode will be set back to
* primary when the regulator is turned on.
*/
#define CPCAP_REG_OFF_MODE_SEC BIT(15)
/**
* SoC specific configuraion for CPCAP regulator. There are at least three
* different SoCs each with their own parameters: omap3, omap4 and tegra2.
*
* The assign_reg and assign_mask seem to allow toggling between primary
* and secondary mode that at least omap4 uses for off mode.
*/
struct cpcap_regulator {
struct regulator_desc rdesc;
const u16 assign_reg;
const u16 assign_mask;
};
#define CPCAP_REG(_ID, reg, assignment_reg, assignment_mask, val_tbl, \
mode_mask, volt_mask, mode_val, off_val, \
volt_trans_time) { \
.rdesc = { \
.name = #_ID, \
.of_match = of_match_ptr(#_ID), \
.ops = &cpcap_regulator_ops, \
.regulators_node = of_match_ptr("regulators"), \
.type = REGULATOR_VOLTAGE, \
.id = CPCAP_##_ID, \
.owner = THIS_MODULE, \
.n_voltages = ARRAY_SIZE(val_tbl), \
.volt_table = (val_tbl), \
.vsel_reg = (reg), \
.vsel_mask = (volt_mask), \
.enable_reg = (reg), \
.enable_mask = (mode_mask), \
.enable_val = (mode_val), \
.disable_val = (off_val), \
.ramp_delay = (volt_trans_time), \
.of_map_mode = cpcap_map_mode, \
}, \
.assign_reg = (assignment_reg), \
.assign_mask = (assignment_mask), \
}
struct cpcap_ddata {
struct regmap *reg;
struct device *dev;
const struct cpcap_regulator *soc;
};
enum cpcap_regulator_id {
CPCAP_SW1,
CPCAP_SW2,
CPCAP_SW3,
CPCAP_SW4,
CPCAP_SW5,
CPCAP_SW6,
CPCAP_VCAM,
CPCAP_VCSI,
CPCAP_VDAC,
CPCAP_VDIG,
CPCAP_VFUSE,
CPCAP_VHVIO,
CPCAP_VSDIO,
CPCAP_VPLL,
CPCAP_VRF1,
CPCAP_VRF2,
CPCAP_VRFREF,
CPCAP_VWLAN1,
CPCAP_VWLAN2,
CPCAP_VSIM,
CPCAP_VSIMCARD,
CPCAP_VVIB,
CPCAP_VUSB,
CPCAP_VAUDIO,
CPCAP_NR_REGULATORS,
};
/*
* We need to also configure regulator idle mode for SoC off mode if
* CPCAP_REG_OFF_MODE_SEC is set.
*/
static int cpcap_regulator_enable(struct regulator_dev *rdev)
{
struct cpcap_regulator *regulator = rdev_get_drvdata(rdev);
int error, ignore;
error = regulator_enable_regmap(rdev);
if (error)
return error;
if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) {
error = regmap_update_bits(rdev->regmap, regulator->assign_reg,
regulator->assign_mask,
regulator->assign_mask);
if (error)
ignore = regulator_disable_regmap(rdev);
}
return error;
}
/*
* We need to also configure regulator idle mode for SoC off mode if
* CPCAP_REG_OFF_MODE_SEC is set.
*/
static int cpcap_regulator_disable(struct regulator_dev *rdev)
{
struct cpcap_regulator *regulator = rdev_get_drvdata(rdev);
int error, ignore;
if (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC) {
error = regmap_update_bits(rdev->regmap, regulator->assign_reg,
regulator->assign_mask, 0);
if (error)
return error;
}
error = regulator_disable_regmap(rdev);
if (error && (rdev->desc->enable_val & CPCAP_REG_OFF_MODE_SEC)) {
ignore = regmap_update_bits(rdev->regmap, regulator->assign_reg,
regulator->assign_mask,
regulator->assign_mask);
}
return error;
}
static unsigned int cpcap_map_mode(unsigned int mode)
{
switch (mode) {
case CPCAP_BIT_AUDIO_NORMAL_MODE:
return REGULATOR_MODE_NORMAL;
case CPCAP_BIT_AUDIO_LOW_PWR:
return REGULATOR_MODE_STANDBY;
default:
return REGULATOR_MODE_INVALID;
}
}
static unsigned int cpcap_regulator_get_mode(struct regulator_dev *rdev)
{
int value;
regmap_read(rdev->regmap, rdev->desc->enable_reg, &value);
if (value & CPCAP_BIT_AUDIO_LOW_PWR)
return REGULATOR_MODE_STANDBY;
return REGULATOR_MODE_NORMAL;
}
static int cpcap_regulator_set_mode(struct regulator_dev *rdev,
unsigned int mode)
{
int value;
switch (mode) {
case REGULATOR_MODE_NORMAL:
value = CPCAP_BIT_AUDIO_NORMAL_MODE;
break;
case REGULATOR_MODE_STANDBY:
value = CPCAP_BIT_AUDIO_LOW_PWR;
break;
default:
return -EINVAL;
}
return regmap_update_bits(rdev->regmap, rdev->desc->enable_reg,
CPCAP_BIT_AUDIO_LOW_PWR, value);
}
static struct regulator_ops cpcap_regulator_ops = {
.enable = cpcap_regulator_enable,
.disable = cpcap_regulator_disable,
.is_enabled = regulator_is_enabled_regmap,
.list_voltage = regulator_list_voltage_table,
.map_voltage = regulator_map_voltage_iterate,
.get_voltage_sel = regulator_get_voltage_sel_regmap,
.set_voltage_sel = regulator_set_voltage_sel_regmap,
.get_mode = cpcap_regulator_get_mode,
.set_mode = cpcap_regulator_set_mode,
};
static const unsigned int unknown_val_tbl[] = { 0, };
static const unsigned int sw2_sw4_val_tbl[] = { 612500, 625000, 637500,
650000, 662500, 675000,
687500, 700000, 712500,
725000, 737500, 750000,
762500, 775000, 787500,
800000, 812500, 825000,
837500, 850000, 862500,
875000, 887500, 900000,
912500, 925000, 937500,
950000, 962500, 975000,
987500, 1000000, 1012500,
1025000, 1037500, 1050000,
1062500, 1075000, 1087500,
1100000, 1112500, 1125000,
1137500, 1150000, 1162500,
1175000, 1187500, 1200000,
1212500, 1225000, 1237500,
1250000, 1262500, 1275000,
1287500, 1300000, 1312500,
1325000, 1337500, 1350000,
1362500, 1375000, 1387500,
1400000, 1412500, 1425000,
1437500, 1450000, 1462500, };
static const unsigned int sw5_val_tbl[] = { 0, 5050000, };
static const unsigned int vcam_val_tbl[] = { 2600000, 2700000, 2800000,
2900000, };
static const unsigned int vcsi_val_tbl[] = { 1200000, 1800000, };
static const unsigned int vdac_val_tbl[] = { 1200000, 1500000, 1800000,
2500000,};
static const unsigned int vdig_val_tbl[] = { 1200000, 1350000, 1500000,
1875000
|