/*
* AXP20x regulators driver.
*
* Copyright (C) 2013 Carlo Caione <carlo@caione.org>
*
* This file is subject to the terms and conditions of the GNU General
* Public License. See the file "COPYING" in the main directory of this
* archive for more details.
*
* This program is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU General Public License for more details.
*/
#include <linux/bitops.h>
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/init.h>
#include <linux/mfd/axp20x.h>
#include <linux/module.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/regmap.h>
#include <linux/regulator/driver.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/of_regulator.h>
#define AXP20X_GPIO0_FUNC_MASK GENMASK(3, 0)
#define AXP20X_GPIO1_FUNC_MASK GENMASK(3, 0)
#define AXP20X_IO_ENABLED 0x03
#define AXP20X_IO_DISABLED 0x07
#define AXP20X_WORKMODE_DCDC2_MASK BIT_MASK(2)
#define AXP20X_WORKMODE_DCDC3_MASK BIT_MASK(1)
#define AXP20X_FREQ_DCDC_MASK GENMASK(3, 0)
#define AXP20X_VBUS_IPSOUT_MGMT_MASK BIT_MASK(2)
#define AXP20X_DCDC2_V_OUT_MASK GENMASK(5, 0)
#define AXP20X_DCDC3_V_OUT_MASK GENMASK(7, 0)
#define AXP20X_LDO24_V_OUT_MASK GENMASK(7, 4)
#define AXP20X_LDO3_V_OUT_MASK GENMASK(6, 0)
#define AXP20X_LDO5_V_OUT_MASK GENMASK(7, 4)
#define AXP20X_PWR_OUT_EXTEN_MASK BIT_MASK(0)
#define AXP20X_PWR_OUT_DCDC3_MASK BIT_MASK(1)
#define AXP20X_PWR_OUT_LDO2_MASK BIT_MASK(2)
#define AXP20X_PWR_OUT_LDO4_MASK BIT_MASK(3)
#define AXP20X_PWR_OUT_DCDC2_MASK BIT_MASK(4)
#define AXP20X_PWR_OUT_LDO3_MASK BIT_MASK(6)
#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE_MASK BIT_MASK(0)
#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_RATE(x) \
((x) << 0)
#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE_MASK BIT_MASK(1)
#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_RATE(x) \
((x) << 1)
#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN_MASK BIT_MASK(2)
#define AXP20X_DCDC2_LDO3_V_RAMP_DCDC2_EN BIT(2)
#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN_MASK BIT_MASK(3)
#define AXP20X_DCDC2_LDO3_V_RAMP_LDO3_EN BIT(3)
#define AXP20X_LDO4_V_OUT_1250mV_START 0x0
#define AXP20X_LDO4_V_OUT_1250mV_STEPS 0
#define AXP20X_LDO4_V_OUT_1250mV_END \
(AXP20X_LDO4_V_OUT_1250mV_START + AXP20X_LDO4_V_OUT_1250mV_STEPS)
#define AXP20X_LDO4_V_OUT_1300mV_START 0x1
#define AXP20X_LDO4_V_OUT_1300mV_STEPS 7
#define AXP20X_LDO4_V_OUT_1300mV_END \
(AXP20X_LDO4_V_OUT_1300mV_START + AXP20X_LDO4_V_OUT_1300mV_STEPS)
#define AXP20X_LDO4_V_OUT_2500mV_START 0x9
#define AXP20X_LDO4_V_OUT_2500mV_STEPS 0
#define AXP20X_LDO4_V_OUT_2500mV_END \
(AXP20X_LDO4_V_OUT_2500mV_START + AXP20X_LDO4_V_OUT_2500mV_STEPS)
#define AXP20X_LDO4_V_OUT_2700mV_START 0xa
#define AXP20X_LDO4_V_OUT_2700mV_STEPS 1
#define AXP20X_LDO4_V_OUT_2700mV_END \
(AXP20X_LDO4_V_OUT_2700mV_START + AXP20X_LDO4_V_OUT_2700mV_STEPS)
#define AXP20X_LDO4_V_OUT_3000mV_START 0xc
#define AXP20X_LDO4_V_OUT_3000mV_STEPS 3
#define AXP20X_LDO4_V_OUT_3000mV_END \
(AXP20X_LDO4_V_OUT_3000mV_START + AXP20X_LDO4_V_OUT_3000mV_STEPS)
#define AXP20X_LDO4_V_OUT_NUM_VOLTAGES 16
#define AXP22X_IO_ENABLED 0x03
#define AXP22X_IO_DISABLED 0x04
#define AXP22X_WORKMODE_DCDCX_MASK(x) BIT_MASK(x)
#define AXP22X_MISC_N_VBUSEN_FUNC BIT(4)
#define AXP22X_DCDC1_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DCDC2_V_OUT_MASK GENMASK(5, 0)
#define AXP22X_DCDC3_V_OUT_MASK GENMASK(5, 0)
#define AXP22X_DCDC4_V_OUT_MASK GENMASK(5, 0)
#define AXP22X_DCDC5_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DC5LDO_V_OUT_MASK GENMASK(2, 0)
#define AXP22X_ALDO1_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_ALDO2_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_ALDO3_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DLDO1_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DLDO2_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DLDO3_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_DLDO4_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_ELDO1_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_ELDO2_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_ELDO3_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_LDO_IO0_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_LDO_IO1_V_OUT_MASK GENMASK(4, 0)
#define AXP22X_PWR_OUT_DC5LDO_MASK BIT_MASK(0)
#define AXP22X_PWR_OUT_DCDC1_MASK BIT_MASK(1)
#define AXP22X_PWR_OUT_DCDC2_MASK BIT_MASK(2)
#define AXP22X_PWR_OUT_DCDC3_MASK BIT_MASK(3)
#define AXP22X_PWR_OUT_DCDC4_MASK BIT_MASK(4)
#define AXP22X_PWR_OUT_DCDC5_MASK BIT_MASK(5)
#define AXP22X_PWR_OUT_ALDO1_MASK BIT_MASK(6)
#define AXP22X_PWR_OUT_ALDO2_MASK BIT_MASK(7)
#define AXP22X_PWR_OUT_SW_MASK BIT_MASK(6)
#define AXP22X_PWR_OUT_DC1SW_MASK BIT_MASK(7)
#define AXP22X_PWR_OUT_ELDO1_MASK BIT_MASK(0)
#define AXP22X_PWR_OUT_ELDO2_MASK BIT_MASK(1)
#define AXP22X_PWR_OUT_ELDO3_MASK BIT_MASK(2)
#define AXP22X_PWR_OUT_DLDO1_MASK BIT_MASK(3)
#define AXP22X_PWR_OUT_DLDO2_MASK BIT_MASK(4)
#define AXP22X_PWR_OUT_DLDO3_MASK BIT_MASK(5)
#define AXP22X_PWR_OUT_DLDO4_MASK BIT_MASK(6)
#define AXP22X_PWR_OUT_ALDO3_MASK BIT_MASK(7)
#define AXP803_PWR_OUT_DCDC1_MASK BIT_MASK(0)
#define AXP803_PWR_OUT_DCDC2_MASK BIT_MASK(1)
#define AXP803_PWR_OUT_DCDC3_MASK BIT_MASK(2)
#define AXP803_PWR_OUT_DCDC4_MASK BIT_MASK(3)
#define AXP803_PWR_OUT_DCDC5_MASK BIT_MASK(4)
#defi