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/*
* DA9150 Fuel-Gauge Driver
*
* Copyright (c) 2015 Dialog Semiconductor
*
* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/of.h>
#include <linux/of_platform.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/power_supply.h>
#include <linux/list.h>
#include <asm/div64.h>
#include <linux/mfd/da9150/core.h>
#include <linux/mfd/da9150/registers.h>
/* Core2Wire */
#define DA9150_QIF_READ (0x0 << 7)
#define DA9150_QIF_WRITE (0x1 << 7)
#define DA9150_QIF_CODE_MASK 0x7F
#define DA9150_QIF_BYTE_SIZE 8
#define DA9150_QIF_BYTE_MASK 0xFF
#define DA9150_QIF_SHORT_SIZE 2
#define DA9150_QIF_LONG_SIZE 4
/* QIF Codes */
#define DA9150_QIF_UAVG 6
#define DA9150_QIF_UAVG_SIZE DA9150_QIF_LONG_SIZE
#define DA9150_QIF_IAVG 8
#define DA9150_QIF_IAVG_SIZE DA9150_QIF_LONG_SIZE
#define DA9150_QIF_NTCAVG 12
#define DA9150_QIF_NTCAVG_SIZE DA9150_QIF_LONG_SIZE
#define DA9150_QIF_SHUNT_VAL 36
#define DA9150_QIF_SHUNT_VAL_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_SD_GAIN 38
#define DA9150_QIF_SD_GAIN_SIZE DA9150_QIF_LONG_SIZE
#define DA9150_QIF_FCC_MAH 40
#define DA9150_QIF_FCC_MAH_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_SOC_PCT 43
#define DA9150_QIF_SOC_PCT_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_CHARGE_LIMIT 44
#define DA9150_QIF_CHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_DISCHARGE_LIMIT 45
#define DA9150_QIF_DISCHARGE_LIMIT_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_FW_MAIN_VER 118
#define DA9150_QIF_FW_MAIN_VER_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_E_FG_STATUS 126
#define DA9150_QIF_E_FG_STATUS_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_SYNC 127
#define DA9150_QIF_SYNC_SIZE DA9150_QIF_SHORT_SIZE
#define DA9150_QIF_MAX_CODES 128
/* QIF Sync Timeout */
#define DA9150_QIF_SYNC_TIMEOUT 1000
#define DA9150_QIF_SYNC_RETRIES 10
/* QIF E_FG_STATUS */
#define DA9150_FG_IRQ_LOW_SOC_MASK (1 << 0)
#define DA9150_FG_IRQ_HIGH_SOC_MASK (1 << 1)
#define DA9150_FG_IRQ_SOC_MASK \
(DA9150_FG_IRQ_LOW_SOC_MASK | DA9150_FG_IRQ_HIGH_SOC_MASK)
/* Private data */
struct da9150_fg {
struct da9150 *da9150;
struct device *dev;
struct mutex io_lock;
struct power_supply *battery;
struct delayed_work work;
u32 interval;
int warn_soc;
int crit_soc;
int soc;
};
/* Battery Properties */
static u32 da9150_fg_read_attr(struct da9150_fg *fg, u8 code, u8 size)
{
u8 buf[size];
u8 read_addr;
u32 res = 0;
int i;
/* Set QIF code (READ mode) */
read_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_READ;
da9150_read_qif(fg->da9150, read_addr, size, buf);
for (i = 0; i < size; ++i)
res |= (buf[i] << (i * DA9150_QIF_BYTE_SIZE));
return res;
}
static void da9150_fg_write_attr(struct da9150_fg *fg, u8 code, u8 size,
u32 val)
{
u8 buf[size];
u8 write_addr;
int i;
/* Set QIF code (WRITE mode) */
write_addr = (code & DA9150_QIF_CODE_MASK) | DA9150_QIF_WRITE;
for (i = 0; i < size; ++i) {
buf[i] = (val >> (i * DA9150_QIF_BYTE_SIZE)) &
DA9150_QIF_BYTE_MASK;
}
da9150_write_qif(fg->da9150, write_addr, size, buf);
}
/* Trigger QIF Sync to update QIF readable data */
static void da9150_fg_read_sync_start(struct da9150_fg *fg)
{
int i = 0;
u32 res = 0;
mutex_lock(&fg->io_lock);
/* Check if QIF sync already requested, and write to sync if not */
res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE);
if (res > 0)
da9150_fg_write_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE, 0);
/* Wait for sync to complete */
res = 0;
while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
usleep_range(DA9150_QIF_SYNC_TIMEOUT,
DA9150_QIF_SYNC_TIMEOUT * 2);
res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE);
}
/* Check if sync completed */
if (res == 0)
dev_err(fg->dev, "Failed to perform QIF read sync!\n");
}
/*
* Should always be called after QIF sync read has been performed, and all
* attributes required have been accessed.
*/
static inline void da9150_fg_read_sync_end(struct da9150_fg *fg)
{
mutex_unlock(&fg->io_lock);
}
/* Sync read of single QIF attribute */
static u32 da9150_fg_read_attr_sync(struct da9150_fg *fg, u8 code, u8 size)
{
u32 val;
da9150_fg_read_sync_start(fg);
val = da9150_fg_read_attr(fg, code, size);
da9150_fg_read_sync_end(fg);
return val;
}
/* Wait for QIF Sync, write QIF data and wait for ack */
static void da9150_fg_write_attr_sync(struct da9150_fg *fg, u8 code, u8 size,
u32 val)
{
int i = 0;
u32 res = 0, sync_val;
mutex_lock(&fg->io_lock);
/* Check if QIF sync already requested */
res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE);
/* Wait for an existing sync to complete */
while ((res == 0) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
usleep_range(DA9150_QIF_SYNC_TIMEOUT,
DA9150_QIF_SYNC_TIMEOUT * 2);
res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE);
}
if (res == 0) {
dev_err(fg->dev, "Timeout waiting for existing QIF sync!\n");
mutex_unlock(&fg->io_lock);
return;
}
/* Write value for QIF code */
da9150_fg_write_attr(fg, code, size, val);
/* Wait for write acknowledgment */
i = 0;
sync_val = res;
while ((res == sync_val) && (i++ < DA9150_QIF_SYNC_RETRIES)) {
usleep_range(DA9150_QIF_SYNC_TIMEOUT,
DA9150_QIF_SYNC_TIMEOUT * 2);
res = da9150_fg_read_attr(fg, DA9150_QIF_SYNC,
DA9150_QIF_SYNC_SIZE);
}
mutex_unlock(&fg->io_lock);
/* Check write was actually successful */
if (res != (sync_val + 1))
dev_err(fg->dev, "Error performing QIF sync write for code %d\n",
code);
}
/* Power Supply attributes */
static int da9150_fg_capacity(struct da9150_fg *fg,
union power_supply_propval *val)
{
val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_SOC_PCT,
DA9150_QIF_SOC_PCT_SIZE);
if (val->intval > 100)
val->intval = 100;
return 0;
}
static int da9150_fg_current_avg(struct da9150_fg *fg,
union power_supply_propval *val)
{
u32 iavg, sd_gain, shunt_val;
u64 div, res;
da9150_fg_read_sync_start(fg);
iavg = da9150_fg_read_attr(fg, DA9150_QIF_IAVG,
DA9150_QIF_IAVG_SIZE);
shunt_val = da9150_fg_read_attr(fg, DA9150_QIF_SHUNT_VAL,
DA9150_QIF_SHUNT_VAL_SIZE);
sd_gain = da9150_fg_read_attr(fg, DA9150_QIF_SD_GAIN,
DA9150_QIF_SD_GAIN_SIZE);
da9150_fg_read_sync_end(fg);
div = (u64) (sd_gain * shunt_val * 65536ULL);
do_div(div, 1000000);
res = (u64) (iavg * 1000000ULL);
do_div(res, div);
val->intval = (int) res;
return 0;
}
static int da9150_fg_voltage_avg(struct da9150_fg *fg,
union power_supply_propval *val)
{
u64 res;
val->intval = da9150_fg_read_attr_sync(fg, DA9150_QIF_UAVG,
DA9150_QIF_UAVG_SIZE);
res = (u64) (val->intval * 186ULL);
do_div(res, 10000);
val->intval =
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