// SPDX-License-Identifier: GPL-2.0
/*
* SH7786 Pinmux
*
* Copyright (C) 2008, 2009 Renesas Solutions Corp.
* Kuninori Morimoto <morimoto.kuninori@renesas.com>
*
* Based on SH7785 pinmux
*
* Copyright (C) 2008 Magnus Damm
*/
#include <linux/init.h>
#include <linux/kernel.h>
#include <cpu/sh7786.h>
#include "sh_pfc.h"
enum {
PINMUX_RESERVED = 0,
PINMUX_DATA_BEGIN,
PA7_DATA, PA6_DATA, PA5_DATA, PA4_DATA,
PA3_DATA, PA2_DATA, PA1_DATA, PA0_DATA,
PB7_DATA, PB6_DATA, PB5_DATA, PB4_DATA,
PB3_DATA, PB2_DATA, PB1_DATA, PB0_DATA,
PC7_DATA, PC6_DATA, PC5_DATA, PC4_DATA,
PC3_DATA, PC2_DATA, PC1_DATA, PC0_DATA,
PD7_DATA, PD6_DATA, PD5_DATA, PD4_DATA,
PD3_DATA, PD2_DATA, PD1_DATA, PD0_DATA,
PE7_DATA, PE6_DATA,
PF7_DATA, PF6_DATA, PF5_DATA, PF4_DATA,
PF3_DATA, PF2_DATA, PF1_DATA, PF0_DATA,
PG7_DATA, PG6_DATA, PG5_DATA,
PH7_DATA, PH6_DATA, PH5_DATA, PH4_DATA,
PH3_DATA, PH2_DATA, PH1_DATA, PH0_DATA,
PJ7_DATA, PJ6_DATA, PJ5_DATA, PJ4_DATA,
PJ3_DATA, PJ2_DATA, PJ1_DATA,
PINMUX_DATA_END,
PINMUX_INPUT_BEGIN,
PA7_IN, PA6_IN, PA5_IN, PA4_IN,
PA3_IN, PA2_IN, PA1_IN, PA0_IN,
PB7_IN, PB6_IN, PB5_IN, PB4_IN,
PB3_IN, PB2_IN, PB1_IN, PB0_IN,
PC7_IN, PC6_IN, PC5_IN, PC4_IN,
PC3_IN, PC2_IN, PC1_IN, PC0_IN,
PD7_IN, PD6_IN, PD5_IN, PD4_IN,
PD3_IN, PD2_IN, PD1_IN, PD0_IN,
PE7_IN, PE6_IN,
PF7_IN, PF6_IN, PF5_IN, PF4_IN,
PF3_IN, PF2_IN, PF1_IN, PF0_IN,
PG7_IN, PG6_IN, PG5_IN,
PH7_IN, PH6_IN, PH5_IN, PH4_IN,
PH3_IN, PH2_IN, PH1_IN, PH0_IN,
PJ7_IN, PJ6_IN, PJ5_IN, PJ4_IN,
PJ3_IN, PJ2_IN, PJ1_IN,
PINMUX_INPUT_END,
PINMUX_OUTPUT_BEGIN,
PA7_OUT, PA6_OUT, PA5_OUT, PA4_OUT,
PA3_OUT, PA2_OUT, PA1_OUT, PA0_OUT,
PB7_OUT, PB6_OUT, PB5_OUT, PB4_OUT,
PB3_OUT, PB2_OUT, PB1_OUT, PB0_OUT,
PC7_OUT, PC6_OUT, PC5_OUT, PC4_OUT,
PC3_OUT, PC2_OUT, PC1_OUT, PC0_OUT,
PD7_OUT, PD6_OUT, PD5_OUT, PD4_OUT,
PD3_OUT, PD2_OUT, PD1_OUT, PD0_OUT,
PE7_OUT, PE6_OUT,
PF7_OUT, PF6_OUT, PF5_OUT, PF4_OUT,
PF3_OUT, PF2_OUT, PF1_OUT, PF0_OUT,
PG7_OUT, PG6_OUT, PG5_OUT,
PH7_OUT, PH6_OUT, PH5_OUT, PH4_OUT,
PH3_OUT, PH2_OUT, PH1_OUT, PH0_OUT,
PJ7_OUT, PJ6_OUT, PJ5_OUT, PJ4_OUT,
PJ3_OUT, PJ2_OUT, PJ1_OUT,
PINMUX_OUTPUT_END,
PINMUX_FUNCTION_BEGIN,
PA7_FN, PA6_FN, PA5_FN, PA4_FN,
PA3_FN, PA2_FN, PA1_FN, PA0_FN,
PB7_FN, PB6_FN, PB5_FN, PB4_FN,
PB3_FN, PB2_FN, PB1_FN, PB0_FN,
PC7_FN, PC6_FN, PC5_FN, PC4_FN,
PC3_FN, PC2_FN, PC1_FN, PC0_FN,
PD7_FN, PD6_FN, PD5_FN, PD4_FN,
PD3_FN, PD2_FN, PD1_FN, PD0_FN,
PE7_FN, PE6_FN,
PF7_FN, PF6_FN, PF5_FN, PF4_FN,
PF3_FN, PF2_FN, PF1_FN, PF0_FN,
PG7_FN, PG6_FN, PG5_FN,
PH7_FN, PH6_FN, PH5_FN, PH4_FN,
PH3_FN, PH2_FN, PH1_FN, PH0_FN,
PJ7_FN, PJ6_FN, PJ5_FN, PJ4_FN,
PJ3_FN, PJ2_FN, PJ1_FN,
P1MSEL14_0, P1MSEL14_1,
P1MSEL13_0, P1MSEL13_1,
P1MSEL12_0, P1MSEL12_1,
P1MSEL11_0, P1MSEL11_1,
P1MSEL10_0, P1MSEL10_1,
P1MSEL9_0, P1MSEL9_1,
P1MSEL8_0, P1MSEL8_1,
P1MSEL7_0, P1MSEL7_1,
P1MSEL6_0, P1MSEL6_1,
P1MSEL5_0, P1MSEL5_1,
P1MSEL4_0, P1MSEL4_1,
P1MSEL3_0, P1MSEL3_1,
P1MSEL2_0, P1MSEL2_1,
P1MSEL1_0, P1MSEL1_1,
P1MSEL0_0, P1MSEL0_1,
P2MSEL15_0, P2MSEL15_1,
P2MSEL14_0, P2MSEL14_1,
P2MSEL13_0, P2MSEL13_1,
P2MSEL12_0, P2MSEL12_1,
P2MSEL11_0, P2MSEL11_1,
P2MSEL10_0, P2MSEL10_1,
P2MSEL9_0, P2MSEL9_1,
P2MSEL8_0, P2MSEL8_1,
P2MSEL7_0, P2MSEL7_1,
P2MSEL6_0, P2MSEL6_1,
P2MSEL5_0, P2MSEL5_1,
P2MSEL4_0, P2MSEL4_1,
P2MSEL3_0, P2MSEL3_1,
P2MSEL2_0, P2MSEL2_1,
P2MSEL1_0, P2MSEL1_1,
P2MSEL0_0, P2MSEL0_1,
PINMUX_FUNCTION_END,
PINMUX_MARK_BEGIN,
DCLKIN_MARK, DCLKOUT_MARK, ODDF_MARK,
VSYNC_MARK, HSYNC_MARK, CDE_MARK, DISP_MARK,
DR0_MARK, DR1_MARK, DR2_MARK, DR3_MARK, DR4_MARK, DR5_MARK,
DG0_MARK, DG1_MARK, DG2_MARK, DG3_MARK, DG4_MARK, DG5_MARK,
DB0_MARK, DB1_MARK, DB2_MARK, DB3_MARK, DB4_MARK, DB5_MARK,
ETH_MAGIC_MARK, ETH_LINK_MARK, ETH_TX_ER_MARK, ETH_TX_EN_MARK,
ETH_MDIO_MARK, ETH_RX_CLK_MARK, ETH_MDC_MARK, ETH_COL_MARK,
ETH_TX_CLK_MARK, ETH_CRS_MARK, ETH_RX_DV_MARK, ETH_RX_ER_MARK,
ETH_TXD3_MARK, ETH_TXD2_MARK, ETH_TXD1_MARK, ETH_TXD0_MARK,
ET