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/*
* Marvell PXA2xx family pin control
*
* Copyright (C) 2015 Robert Jarzmik
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; version 2 of the License.
*
*/
#include <linux/bitops.h>
#include <linux/io.h>
#include <linux/of.h>
#include <linux/of_address.h>
#include <linux/module.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include "../pinctrl-utils.h"
#include "pinctrl-pxa2xx.h"
static int pxa2xx_pctrl_get_groups_count(struct pinctrl_dev *pctldev)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
return pctl->ngroups;
}
static const char *pxa2xx_pctrl_get_group_name(struct pinctrl_dev *pctldev,
unsigned tgroup)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_group *group = pctl->groups + tgroup;
return group->name;
}
static int pxa2xx_pctrl_get_group_pins(struct pinctrl_dev *pctldev,
unsigned tgroup,
const unsigned **pins,
unsigned *num_pins)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_group *group = pctl->groups + tgroup;
*pins = (unsigned *)&group->pin;
*num_pins = 1;
return 0;
}
static const struct pinctrl_ops pxa2xx_pctl_ops = {
#ifdef CONFIG_OF
.dt_node_to_map = pinconf_generic_dt_node_to_map_all,
.dt_free_map = pinctrl_utils_free_map,
#endif
.get_groups_count = pxa2xx_pctrl_get_groups_count,
.get_group_name = pxa2xx_pctrl_get_group_name,
.get_group_pins = pxa2xx_pctrl_get_group_pins,
};
static struct pxa_desc_function *
pxa_desc_by_func_group(struct pxa_pinctrl *pctl, const char *pin_name,
const char *func_name)
{
int i;
struct pxa_desc_function *df;
for (i = 0; i < pctl->npins; i++) {
const struct pxa_desc_pin *pin = pctl->ppins + i;
if (!strcmp(pin->pin.name, pin_name))
for (df = pin->functions; df->name; df++)
if (!strcmp(df->name, func_name))
return df;
}
return NULL;
}
static int pxa2xx_pmx_gpio_set_direction(struct pinctrl_dev *pctldev,
struct pinctrl_gpio_range *range,
unsigned pin,
bool input)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
unsigned long flags;
uint32_t val;
void __iomem *gpdr;
gpdr = pctl->base_gpdr[pin / 32];
dev_dbg(pctl->dev, "set_direction(pin=%d): dir=%d\n",
pin, !input);
spin_lock_irqsave(&pctl->lock, flags);
val = readl_relaxed(gpdr);
val = (val & ~BIT(pin % 32)) | (input ? 0 : BIT(pin % 32));
writel_relaxed(val, gpdr);
spin_unlock_irqrestore(&pctl->lock, flags);
return 0;
}
static const char *pxa2xx_pmx_get_func_name(struct pinctrl_dev *pctldev,
unsigned function)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_function *pf = pctl->functions + function;
return pf->name;
}
static int pxa2xx_get_functions_count(struct pinctrl_dev *pctldev)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
return pctl->nfuncs;
}
static int pxa2xx_pmx_get_func_groups(struct pinctrl_dev *pctldev,
unsigned function,
const char * const **groups,
unsigned * const num_groups)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_function *pf = pctl->functions + function;
*groups = pf->groups;
*num_groups = pf->ngroups;
return 0;
}
static int pxa2xx_pmx_set_mux(struct pinctrl_dev *pctldev, unsigned function,
unsigned tgroup)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_group *group = pctl->groups + tgroup;
struct pxa_desc_function *df;
int pin, shift;
unsigned long flags;
void __iomem *gafr, *gpdr;
u32 val;
df = pxa_desc_by_func_group(pctl, group->name,
(pctl->functions + function)->name);
if (!df)
return -EINVAL;
pin = group->pin;
gafr = pctl->base_gafr[pin / 16];
gpdr = pctl->base_gpdr[pin / 32];
shift = (pin % 16) << 1;
dev_dbg(pctl->dev, "set_mux(pin=%d): af=%d dir=%d\n",
pin, df->muxval >> 1, df->muxval & 0x1);
spin_lock_irqsave(&pctl->lock, flags);
val = readl_relaxed(gafr);
val = (val & ~(0x3 << shift)) | ((df->muxval >> 1) << shift);
writel_relaxed(val, gafr);
val = readl_relaxed(gpdr);
val = (val & ~BIT(pin % 32)) | ((df->muxval & 1) ? BIT(pin % 32) : 0);
writel_relaxed(val, gpdr);
spin_unlock_irqrestore(&pctl->lock, flags);
return 0;
}
static const struct pinmux_ops pxa2xx_pinmux_ops = {
.get_functions_count = pxa2xx_get_functions_count,
.get_function_name = pxa2xx_pmx_get_func_name,
.get_function_groups = pxa2xx_pmx_get_func_groups,
.set_mux = pxa2xx_pmx_set_mux,
.gpio_set_direction = pxa2xx_pmx_gpio_set_direction,
};
static int pxa2xx_pconf_group_get(struct pinctrl_dev *pctldev,
unsigned group,
unsigned long *config)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_group *g = pctl->groups + group;
unsigned long flags;
unsigned pin = g->pin;
void __iomem *pgsr = pctl->base_pgsr[pin / 32];
u32 val;
spin_lock_irqsave(&pctl->lock, flags);
val = readl_relaxed(pgsr) & BIT(pin % 32);
*config = val ? PIN_CONFIG_LOW_POWER_MODE : 0;
spin_unlock_irqrestore(&pctl->lock, flags);
dev_dbg(pctl->dev, "get sleep gpio state(pin=%d) %d\n",
pin, !!val);
return 0;
}
static int pxa2xx_pconf_group_set(struct pinctrl_dev *pctldev,
unsigned group,
unsigned long *configs,
unsigned num_configs)
{
struct pxa_pinctrl *pctl = pinctrl_dev_get_drvdata(pctldev);
struct pxa_pinctrl_group *g = pctl->groups + group;
unsigned long flags;
unsigned pin = g->pin;
void __iomem *pgsr = pctl->base_pgsr[pin / 32];
int
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