// SPDX-License-Identifier: GPL-2.0-only
/*
* Oxford Semiconductor OXNAS SoC Family pinctrl driver
*
* Copyright (C) 2016 Neil Armstrong <narmstrong@baylibre.com>
*
* Based on pinctrl-pic32.c
* Joshua Henderson, <joshua.henderson@microchip.com>
* Copyright (C) 2015 Microchip Technology Inc. All rights reserved.
*/
#include <linux/gpio/driver.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/pinctrl/pinconf.h>
#include <linux/pinctrl/pinconf-generic.h>
#include <linux/pinctrl/pinctrl.h>
#include <linux/pinctrl/pinmux.h>
#include <linux/platform_device.h>
#include <linux/slab.h>
#include <linux/regmap.h>
#include <linux/mfd/syscon.h>
#include "pinctrl-utils.h"
#define PINS_PER_BANK 32
#define GPIO_BANK_START(bank) ((bank) * PINS_PER_BANK)
/* OX810 Regmap Offsets */
#define PINMUX_810_PRIMARY_SEL0 0x0c
#define PINMUX_810_SECONDARY_SEL0 0x14
#define PINMUX_810_TERTIARY_SEL0 0x8c
#define PINMUX_810_PRIMARY_SEL1 0x10
#define PINMUX_810_SECONDARY_SEL1 0x18
#define PINMUX_810_TERTIARY_SEL1 0x90
#define PINMUX_810_PULLUP_CTRL0 0xac
#define PINMUX_810_PULLUP_CTRL1 0xb0
/* OX820 Regmap Offsets */
#define PINMUX_820_BANK_OFFSET 0x100000
#define PINMUX_820_SECONDARY_SEL 0x14
#define PINMUX_820_TERTIARY_SEL 0x8c
#define PINMUX_820_QUATERNARY_SEL 0x94
#define PINMUX_820_DEBUG_SEL 0x9c
#define PINMUX_820_ALTERNATIVE_SEL 0xa4
#define PINMUX_820_PULLUP_CTRL 0xac
/* GPIO Registers */
#define INPUT_VALUE 0x00
#define OUTPUT_EN 0x04
#define IRQ_PENDING 0x0c
#define OUTPUT_SET 0x14
#define OUTPUT_CLEAR 0x18
#define OUTPUT_EN_SET 0x1c
#define OUTPUT_EN_CLEAR 0x20
#define RE_IRQ_ENABLE 0x28
#define FE_IRQ_ENABLE 0x2c
struct oxnas_function {
const char *name;
const char * const *groups;
unsigned int ngroups;
};
struct oxnas_pin_group {
const char *name;
unsigned int pin;
unsigned int bank;
struct oxnas_desc_function *functions;
};
struct oxnas_desc_function {
const char *name;
unsigned int fct;
};
struct oxnas_gpio_bank {
void __iomem *reg_base;
struct gpio_chip gpio_chip;
struct irq_chip irq_chip;
unsigned int id;
};
struct oxnas_pinctrl {
struct regmap *regmap;
struct device *dev;
struct pinctrl_dev *pctldev;
const struct oxnas_function *functions;
unsigned int nfunctions;
const struct oxnas_pin_group *groups;
unsigned int ngroups;
struct oxnas_gpio_bank *gpio_banks;
unsigned int nbanks;
};
struct oxnas_pinctrl_data {
struct pinctrl_desc *desc;
struct oxnas_pinctrl *pctl;
};
static const struct pinctrl_pin_desc oxnas_ox810se_pins[] = {
PINCTRL_PIN(0, "gpio0"),
PINCTRL_PIN(1, "gpio1"),
PINCTRL_PIN(2, "gpio2"),
PINCTRL_PIN(3, "gpio3"),
PINCTRL_PIN(4, "gpio4"),
PINCTRL_PIN(5, "gpio5"),
PINCTRL_PIN(6, "gpio6"),
PINCTRL_PIN(7, "gpio7"),
PINCTRL_PIN(8,