// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2019 MediaTek Inc.
* Author: Andy Teng <andy.teng@mediatek.com>
*
*/
#include <linux/module.h>
#include "pinctrl-mtk-mt6779.h"
#include "pinctrl-paris.h"
/* MT6779 have multiple bases to program pin configuration listed as the below:
* gpio:0x10005000, iocfg_rm:0x11C20000, iocfg_br:0x11D10000,
* iocfg_lm:0x11E20000, iocfg_lb:0x11E70000, iocfg_rt:0x11EA0000,
* iocfg_lt:0x11F20000, iocfg_tl:0x11F30000
* _i_based could be used to indicate what base the pin should be mapped into.
*/
#define PIN_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \
32, 0)
#define PINS_FIELD_BASE(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits) \
PIN_FIELD_CALC(s_pin, e_pin, i_base, s_addr, x_addrs, s_bit, x_bits, \
32, 1)
static const struct mtk_pin_field_calc mt6779_pin_mode_range[] = {
PIN_FIELD_BASE(0, 7, 0, 0x0300, 0x10, 0, 4),
PIN_FIELD_BASE(8, 15, 0, 0x0310, 0x10, 0, 4),
PIN_FIELD_BASE(16, 23, 0, 0x0320, 0x10, 0, 4),
PIN_FIELD_BASE(24, 31, 0, 0x0330, 0x10, 0, 4),
PIN_FIELD_BASE(32, 39, 0, 0x0340, 0x10, 0, 4),
PIN_FIELD_BASE(40, 47, 0, 0x0350, 0x10, 0, 4),
PIN_FIELD_BASE(48, 55, 0, 0x0360, 0x10, 0, 4),
PIN_FIELD_BASE(56, 63, 0, 0x0370, 0x10, 0, 4),
PIN_FIELD_BASE(64, 71, 0, 0x0380, 0x10, 0, 4),
PIN_FIELD_BASE(72, 79, 0, 0x0390, 0x10, 0, 4),
PIN_FIELD_BASE(80, 87, 0, 0x03A0, 0x10, 0, 4),
PIN_FIELD_BASE(88, 95, 0, 0x03B0, 0x10, 0, 4),
PIN_FIELD_BASE(96, 103, 0, 0x03C0, 0x10, 0, 4),
PIN_FIELD_BASE(104, 111, 0, 0x03D0, 0x10, 0, 4),
PIN_FIELD_BASE(112, 119, 0, 0x03E0, 0x10, 0, 4),
PIN_FIELD_BASE(120, 127, 0, 0x03F0, 0x10, 0, 4),
PIN_FIELD_BASE(128, 135, 0, 0x0400, 0x10, 0, 4),
PIN_FIELD_BASE(136, 143, 0, 0x0410, 0x10, 0, 4),
PIN_FIELD_BASE(144, 151, 0, 0x0420, 0x10, 0, 4),
PIN_FIELD_BASE(152, 159, 0, 0x0430, 0x10, 0, 4),
PIN_FIELD_BASE(160, 167, 0, 0x0440, 0x10, 0, 4),
PIN_FIELD_BASE(168, 175, 0, 0x0450, 0x10, 0, 4),
PIN_FIELD_BASE(176, 183, 0, 0x0460, 0x10, 0, 4),
PIN_FIELD_BASE(184, 191, 0, 0x0470, 0x10, 0, 4),
PIN_FIELD_BASE(192, 199, 0, 0x0480, 0x10, 0, 4),
PIN_FIELD_BASE(200, 202, 0, 0x0490, 0x10, 0, 4),
};
static const struct mtk_pin_field_calc mt6779_pin_dir_range[] = {
PIN_FIELD_BASE(0, 31, 0, 0x0000, 0x10, 0, 1),
PIN_FIELD_BASE(32, 63, 0, 0x0010, 0x10, 0, 1),
PIN_FIELD_BASE(64, 95, 0, 0x0020, 0x10, 0, 1),
PIN_FIELD_BASE(96, 127, 0, 0x0030, 0x10, 0, 1),
PIN_FIELD_BASE(128, 159, 0, 0x0040, 0x10, 0, 1),
PIN_FIELD_BASE(160, 191, 0, 0x0050, 0x10, 0, 1),
PIN_FIELD_BASE(192, 202, 0, 0x0060, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6779_pin_di_range[] = {
PIN_FIELD_BASE(0, 31, 0, 0x0200, 0x10, 0, 1),
PIN_FIELD_BASE(32, 63, 0, 0x0210, 0x10, 0, 1),
PIN_FIELD_BASE(64, 95, 0, 0x0220, 0x10, 0, 1),
PIN_FIELD_BASE(96, 127, 0, 0x0230, 0x10, 0, 1),
PIN_FIELD_BASE(128, 159, 0, 0x0240, 0x10, 0, 1),
PIN_FIELD_BASE(160, 191, 0, 0x0250, 0x10, 0, 1),
PIN_FIELD_BASE(192, 202, 0, 0x0260, 0x10, 0, 1),
};
static const struct mtk_pin_field_calc mt6779_pin_do_range[] = {
PIN_FIELD_BASE(0, 31, 0, 0x0100, 0x10, 0, 1),
PIN_FIELD_BASE(32, 63, 0, 0x0110, 0x10, 0, 1),
PIN_FIELD_BASE(64, 95, 0, 0x0120, 0x10, 0, 1),
PIN_FIELD_BASE(96, 127, 0, 0x0130, 0x10, 0, 1),
PIN_FIELD_BASE(128, 159, 0, 0x0140, 0x10, 0, 1),
PIN_FIELD_BASE(160, 191, 0, 0x0150, 0x10, 0,