// SPDX-License-Identifier: GPL-2.0 OR BSD-3-Clause
/* Copyright(c) 2018-2019 Realtek Corporation
*/
#include <linux/module.h>
#include <linux/pci.h>
#include "main.h"
#include "pci.h"
#include "tx.h"
#include "rx.h"
#include "fw.h"
#include "debug.h"
static u32 rtw_pci_tx_queue_idx_addr[] = {
[RTW_TX_QUEUE_BK] = RTK_PCI_TXBD_IDX_BKQ,
[RTW_TX_QUEUE_BE] = RTK_PCI_TXBD_IDX_BEQ,
[RTW_TX_QUEUE_VI] = RTK_PCI_TXBD_IDX_VIQ,
[RTW_TX_QUEUE_VO] = RTK_PCI_TXBD_IDX_VOQ,
[RTW_TX_QUEUE_MGMT] = RTK_PCI_TXBD_IDX_MGMTQ,
[RTW_TX_QUEUE_HI0] = RTK_PCI_TXBD_IDX_HI0Q,
[RTW_TX_QUEUE_H2C] = RTK_PCI_TXBD_IDX_H2CQ,
};
static u8 rtw_pci_get_tx_qsel(struct sk_buff *skb, u8 queue)
{
switch (queue) {
case RTW_TX_QUEUE_BCN:
return TX_DESC_QSEL_BEACON;
case RTW_TX_QUEUE_H2C:
return TX_DESC_QSEL_H2C;
case RTW_TX_QUEUE_MGMT:
return TX_DESC_QSEL_MGMT;
case RTW_TX_QUEUE_HI0:
return TX_DESC_QSEL_HIGH;
default:
return skb->priority;
}
};
static u8 rtw_pci_read8(struct rtw_dev *rtwdev, u32 addr)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv;
return readb(rtwpci->mmap + addr);
}
static u16 rtw_pci_read16(struct rtw_dev *rtwdev, u32 addr)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv;
return readw(rtwpci->mmap + addr);
}
static u32 rtw_pci_read32(struct rtw_dev *rtwdev, u32 addr)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv;
return readl(rtwpci->mmap + addr);
}
static void rtw_pci_write8(struct rtw_dev *rtwdev, u32 addr, u8 val)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv;
writeb(val, rtwpci->mmap + addr);
}
static void rtw_pci_write16(struct rtw_dev *rtwdev, u32 addr, u16 val)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)rtwdev->priv;
writew(val, rtwpci->mmap + addr);
}
static void rtw_pci_write32(struct rtw_dev *rtwdev, u32 addr, u32 val)
{
struct rtw_pci *rtwpci = (struct rtw_pci *)