// SPDX-License-Identifier: GPL-2.0+
/*
* Core PHY library, taken from phy.c
*/
#include <linux/export.h>
#include <linux/phy.h>
#include <linux/of.h>
const char *phy_speed_to_str(int speed)
{
BUILD_BUG_ON_MSG(__ETHTOOL_LINK_MODE_MASK_NBITS != 69,
"Enum ethtool_link_mode_bit_indices and phylib are out of sync. "
"If a speed or mode has been added please update phy_speed_to_str "
"and the PHY settings array.\n");
switch (speed) {
case SPEED_10:
return "10Mbps";
case SPEED_100:
return "100Mbps";
case SPEED_1000:
return "1Gbps";
case SPEED_2500:
return "2.5Gbps";
case SPEED_5000:
return "5Gbps";
case SPEED_10000:
return "10Gbps";
case SPEED_14000:
return "14Gbps";
case SPEED_20000:
return "20Gbps";
case SPEED_25000:
return "25Gbps";
case SPEED_40000:
return "40Gbps";
case SPEED_50000:
return "50Gbps";
case SPEED_56000:
return "56Gbps";
case SPEED_100000:
return "100Gbps";
case SPEED_200000:
return "200Gbps";
case SPEED_UNKNOWN:
return "Unknown";
default:
return "Unsupported (update phy-core.c)";
}
}
EXPORT_SYMBOL_GPL(phy_speed_to_str);
const char *phy_duplex_to_str(unsigned int duplex)
{
if (duplex == DUPLEX_HALF)
return "Half";
if (duplex == DUPLEX_FULL)
return "Full";
if (duplex == DUPLEX_UNKNOWN)
return "Unknown";
return "Unsupported (update phy-core.c)";
}
EXPORT_SYMBOL_GPL(phy_duplex_to_str);
/* A mapping of all SUPPORTED settings to speed/duplex. This table
* must be grouped by speed and sorted in descending match priority
* - iow, descending speed. */
#define PHY_SETTING(s, d, b) { .speed = SPEED_ ## s, .duplex = DUPLEX_ ## d, \
.bit = ETHTOOL_LINK_MODE_ ## b ## _BIT}
static const struct phy_setting settings[] = {
/* 200G */
PHY_SETTING( 200000, FULL, 200000baseCR4_Full ),
PHY_SETTING( 200000, FULL, 200000baseKR4_Full ),
PHY_SETTING( 200000, FULL, 200000baseLR4_ER4_FR4_Full ),
PHY_SETTING( 200000, FULL, 200000baseDR4_Full ),
PHY_SETTING( 200000, FULL, 200000baseSR4_Full ),
/* 100G */
PHY_SETTING( 100000, FULL, 100000baseCR4_Full ),
PHY_SETTING( 100000, FULL, 100000baseKR4_Full ),
PHY_SETTING( 100000, FULL, 100000baseLR4_ER4_Full ),
PHY_SETTING( 100000, FULL, 100000baseSR4_Full ),
PHY_SETTING( 100000, FULL, 100000baseCR2_Full ),
PHY_SETTING( 100000, FULL, 100000baseKR2_Full ),
PHY_SETTING( 100000, FULL, 100000baseLR2_ER2_FR2_Full ),
PHY_SETTING( 100000, FULL, 100000baseDR2_Full ),
PHY_SETTING( 100000, FULL, 100000baseSR2_Full ),
/* 56G */
PHY_SETTING( 56000, FULL, 56000baseCR4_Full ),
PHY_SETTING( 56000, FULL, 56000baseKR4_Full ),
PHY_SETTING( 56000, FULL, 56000baseLR4_Full ),
PHY_SETTING( 56000, FULL, 56000baseSR4_Full ),
/* 50G */
PHY_SETTING( 50000, FULL, 50000baseCR2_Full ),
PHY_SETTING( 50000, FULL, 50000baseKR2_Full ),
PHY_SETTING( 50000, FULL, 50000baseSR2_Full ),
PHY_SETTING( 50000, FULL, 50000baseCR_Full ),
PHY_SETTING( 50000, FULL, 50000baseKR_Full ),
PHY_SETTING( 50000, FULL, 50000baseLR_ER_FR_Full ),
PHY_SETTING( 50000, FULL, 50000baseDR_Full ),
PHY_SETTING( 50000, FULL, 50000baseSR_Full ),
/* 40G */
PHY_SETTING( 40000, FULL, 40000baseCR4_Full ),
PHY_SETTING( 40000, FULL, 40000baseKR4_Full ),
PHY_SETTING( 40000, FULL, 40000baseLR4_Full ),
PHY_SETTING( 40000, FULL, 40000baseSR4_Full ),
/* 25G */
PHY_SETTING( 25000, FULL, 25000baseCR_Full ),
PHY_SETTING( 25000, FULL, 25000baseKR_Full ),
PHY_SETTING( 25000, FULL, 25000baseSR_Full ),
/* 20G */
PHY_SETTING( 20000, FULL, 20000baseKR2_Full ),
PHY_SETTING( 20000, FULL, 20000baseMLD2_Full ),
/* 10G */
PHY_SETTING( 10000, FULL, 10000baseCR_Full ),
PHY_SETTING( 10000, FULL, 10000baseER_Full ),
PHY_SETTING( 10000, FULL, 10000baseKR_Full ),
PHY_SETTING( 10000, FULL, 10000baseKX4_Full ),
PHY_SETTING( 10000, FULL, 10000baseLR_Full ),
PHY_SETTING( 10000, FULL, 10000baseLRM_Full ),
PHY_SETTING( 10000, FULL, 10000baseR_FEC ),
PHY_SETTING( 10000, FULL, 10000baseSR_Full ),
PHY_SETTING( 10000, FULL, 10000baseT_Full ),
/* 5G */
PHY_SETTING( 5000, FULL, 5000baseT_Full ),
/* 2.5G */
PHY_SETTING( 2500, FULL, 2500baseT_Full ),
PHY_SETTING( 2500, FULL, 2500baseX_Full ),
/* 1G */
PHY_SETTING( 1000, FULL, 1000