// SPDX-License-Identifier: GPL-2.0-only
/*
* FUJITSU Extended Socket Network Device driver
* Copyright (c) 2015 FUJITSU LIMITED
*/
#include "fjes_hw.h"
#include "fjes.h"
#include "fjes_trace.h"
static void fjes_hw_update_zone_task(struct work_struct *);
static void fjes_hw_epstop_task(struct work_struct *);
/* supported MTU list */
const u32 fjes_support_mtu[] = {
FJES_MTU_DEFINE(8 * 1024),
FJES_MTU_DEFINE(16 * 1024),
FJES_MTU_DEFINE(32 * 1024),
FJES_MTU_DEFINE(64 * 1024),
0
};
u32 fjes_hw_rd32(struct fjes_hw *hw, u32 reg)
{
u8 *base = hw->base;
u32 value = 0;
value = readl(&base[reg]);
return value;
}
static u8 *fjes_hw_iomap(struct fjes_hw *hw)
{
u8 *base;
if (!request_mem_region(hw->hw_res.start, hw->hw_res.size,
fjes_driver_name)) {
pr_err("request_mem_region failed\n");
return NULL;
}
base = (u8 *)ioremap(hw->hw_res.start, hw->hw_res.size);
return base;
}
static void fjes_hw_iounmap(struct fjes_hw *hw)
{
iounmap(hw->base);
release_mem_region(hw->hw_res.start, hw->hw_res.size);
}
int fjes_hw_reset(struct fjes_hw *hw)
{
union REG_DCTL dctl;
int timeout;
dctl.reg = 0;
dctl.bits.reset = 1;
wr32(XSCT_DCTL, dctl.reg);
timeout = FJES_DEVICE_RESET_TIMEOUT * 1000;
dctl.reg = rd32(XSCT_DCTL);
while ((dctl.bits.reset == 1) && (timeout > 0)) {
msleep(1000);
dctl.reg = rd32(XSCT_DCTL);
timeout -= 1000;
}
return timeout > 0 ? 0 : -EIO;
}
static int fjes_hw_get_max_epid(struct fjes_hw *hw)
{
union REG_MAX_EP info;
info.reg