/* SPDX-License-Identifier: GPL-2.0-only */
/****************************************************************************
* Driver for Solarflare network controllers and boards
* Copyright 2005-2006 Fen Systems Ltd.
* Copyright 2005-2013 Solarflare Communications Inc.
*/
/* Common definitions for all Efx net driver code */
#ifndef EF4_NET_DRIVER_H
#define EF4_NET_DRIVER_H
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/ethtool.h>
#include <linux/if_vlan.h>
#include <linux/timer.h>
#include <linux/mdio.h>
#include <linux/list.h>
#include <linux/pci.h>
#include <linux/device.h>
#include <linux/highmem.h>
#include <linux/workqueue.h>
#include <linux/mutex.h>
#include <linux/rwsem.h>
#include <linux/vmalloc.h>
#include <linux/i2c.h>
#include <linux/mtd/mtd.h>
#include <net/busy_poll.h>
#include "enum.h"
#include "bitfield.h"
#include "filter.h"
/**************************************************************************
*
* Build definitions
*
**************************************************************************/
#define EF4_DRIVER_VERSION "4.1"
#ifdef DEBUG
#define EF4_BUG_ON_PARANOID(x) BUG_ON(x)
#define EF4_WARN_ON_PARANOID(x) WARN_ON(x)
#else
#define EF4_BUG_ON_PARANOID(x) do {} while (0)
#define EF4_WARN_ON_PARANOID(x) do {} while (0)
#endif
/**************************************************************************
*
* Efx data structures
*
**************************************************************************/
#define EF4_MAX_CHANNELS 32U
#define EF4_MAX_RX_QUEUES EF4_MAX_CHANNELS
#define EF4_EXTRA_CHANNEL_IOV 0
#define EF4_EXTRA_CHANNEL_PTP 1
#define EF4_MAX_EXTRA_CHANNELS 2U
/* Checksum generation is a per-queue option in hardware, so each
* queue visible to the networking core is backed by two hardware TX
* queues. */
#define EF4_MAX_TX_TC 2
#define EF4_MAX_CORE_TX_QUEUES (EF4_MAX_TX_TC * EF4_MAX_CHANNELS)
#define EF4_TXQ_TYPE_OFFLOAD 1 /* flag */
#define EF4_TXQ_TYPE_HIGHPRI 2 /* flag */
#define EF4_TXQ_TYPES 4
#define EF4_MAX_TX_QUEUES (EF4_TXQ_TYPES * EF4_MAX_CHANNELS)
/* Maximum possible MTU the driver supports */
#define EF4_MAX_MTU (9 * 1024)
/* Minimum MTU, from RFC791 (IP) */
#define EF4_MIN_MTU 68
/* Size of an RX scatter buffer. Small enough to pack 2 into a 4K page,
* and should be a multiple of the cache line size.
*/
#define EF4_RX_USR_BUF_SIZE (2048 - 256)
/* If possible, we should ensure cache line alignment at start and end
* of every buffer. Otherwise, we just need to ensure 4-byte
* alignment of the network header.
*/
#if NET_IP_ALIGN == 0
#define EF4_RX_BUF_ALIGNMENT L1_CACHE_BYTES
#else
#define EF4_RX_BUF_ALIGNMENT 4
#endif
struct ef4_self_tests;
/**
* struct ef4_buffer - A general-purpose DMA buffer
* @addr: host base address of the buffer
* @dma_addr: DMA base address of the buffer
* @len: Buffer length, in bytes
*
* The NIC uses these buffers for its interrupt status registers and
* MAC stats dumps.
*/
struct ef4_buffer {
void *addr;
dma_addr_t dma_addr;
unsigned int len;
};
/**
* struct ef4_special_buffer - DMA buffer entered into buffer table
* @buf: Standard &struct ef4_buffer
* @index: Buffer index within controller;s buffer table
* @entries: Number of buffer table entries
*
* The NIC has a buffer table that maps buffers of size %EF4_BUF_SIZE.
* Event and descriptor rings are addressed via one or more buffer
* table entries (and so can be physically non-contiguous, although we
* currently do not take advantage of that). On Falcon and Siena we
* have to take care of allocating and initialising the entries
* ourselves. On later hardware this is managed by the firmware and
* @index and @entries are left as 0.
*/
struct ef4_special_buffer {
struct ef4_buffer buf;
unsigned int index;
unsigned int entries;
};
/**
* struct ef4_tx_buffer - buffer state for a TX descriptor
* @skb: When @flags & %EF4_TX_BUF_SKB, the associated socket buffer to be
* freed when descriptor completes
* @option: When @flags & %EF4_TX_BUF_OPTION, a NIC-specific option descriptor.
* @dma_addr: DMA address of the fragment.
* @flags: Flags for allocation and DMA mapping type
* @len: Length of this fragment.
* This field is zero when the queue slot is empty.
* @unmap_len: Length of this fragment to unmap
* @dma_offset: Offset of @dma_addr from the address of the backing DMA mapping.
* Only valid if @unmap_len != 0.
*/
struct ef4_tx_buffer {
const struct sk_buff *skb;
union {
ef4_qword_t option;
dma_addr_t dma_addr;
};
unsigned short flags;
unsigned short len;
un