/* Renesas Ethernet AVB device driver
*
* Copyright (C) 2014-2015 Renesas Electronics Corporation
* Copyright (C) 2015 Renesas Solutions Corp.
* Copyright (C) 2015 Cogent Embedded, Inc. <source@cogentembedded.com>
*
* Based on the SuperH Ethernet driver
*
* This program is free software; you can redistribute it and/or modify it
* under the terms and conditions of the GNU General Public License version 2,
* as published by the Free Software Foundation.
*/
#ifndef __RAVB_H__
#define __RAVB_H__
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/kernel.h>
#include <linux/mdio-bitbang.h>
#include <linux/netdevice.h>
#include <linux/phy.h>
#include <linux/platform_device.h>
#include <linux/ptp_clock_kernel.h>
#define BE_TX_RING_SIZE 64 /* TX ring size for Best Effort */
#define BE_RX_RING_SIZE 1024 /* RX ring size for Best Effort */
#define NC_TX_RING_SIZE 64 /* TX ring size for Network Control */
#define NC_RX_RING_SIZE 64 /* RX ring size for Network Control */
#define BE_TX_RING_MIN 64
#define BE_RX_RING_MIN 64
#define BE_TX_RING_MAX 1024
#define BE_RX_RING_MAX 2048
#define PKT_BUF_SZ 1538
/* Driver's parameters */
#define RAVB_ALIGN 128
/* Hardware time stamp */
#define RAVB_TXTSTAMP_VALID 0x00000001 /* TX timestamp valid */
#define RAVB_TXTSTAMP_ENABLED 0x00000010 /* Enable TX timestamping */
#define RAVB_RXTSTAMP_VALID 0x00000001 /* RX timestamp valid */
#define RAVB_RXTSTAMP_TYPE 0x00000006 /* RX type mask */
#define RAVB_RXTSTAMP_TYPE_V2_L2_EVENT 0x00000002
#define RAVB_RXTSTAMP_TYPE_ALL 0x00000006
#define RAVB_RXTSTAMP_ENABLED 0x00000010 /* Enable RX timestamping */
enum ravb_reg {
/* AVB-DMAC registers */
CCC = 0x0000,
DBAT = 0x0004,
DLR = 0x0008,
CSR = 0x000C,
CDAR0 = 0x0010,
CDAR1 = 0x0014,
CDAR2 = 0x0018,
CDAR3 = 0x001C,
CDAR4 = 0x0020,
CDAR5 = 0x0024,
CDAR6 = 0x0028,
CDAR7 = 0x002C,
CDAR8 = 0x0030,
CDAR9 = 0x0034,
CDAR10 = 0x0038,
CDAR11 = 0x003C,
CDAR12 = 0x0040,
CDAR13 = 0x0044,
CDAR14 = 0x0048,
CDAR15 = 0x004C,
CDAR16 = 0x0050,
CDAR17 = 0x0054,
CDAR18 = 0x0058,
CDAR19 = 0x005C,
CDAR20 = 0x0060,
CDAR21 = 0x0064,
ESR = 0x0088,
RCR = 0x0090,
RQC0 = 0x0094,
RQC1 = 0x0098,
RQC2 = 0x009C,
RQC3 = 0x00A0,
RQC4 = 0x00A4,
RPC = 0x00B0,
UFCW = 0x00BC,
UFCS = 0x00C0,
UFCV0 = 0x00C4,
UFCV1 = 0x00C8,
UFCV2 = 0x00CC,
UFCV3 = 0x00D0,
UFCV4 = 0x00D4,
UFCD0 = 0x00E0,
UFCD1 = 0x00E4,
UFCD2 = 0x00E8,
UFCD3 = 0x00EC,
UFCD4 = 0x00F0,
SFO = 0x00FC,
SFP0 = 0x0100,
SFP1 = 0x0104,
SFP2 = 0x0108,
SFP3 = 0x010C,
SFP4 = 0x0110,
SFP5 = 0x0114,
SFP6 = 0x0118,
SFP7 = 0x011C,
SFP8 = 0x0120,
SFP9 = 0x0124,
SFP10 = 0x0128,
SFP11 = 0x012C,
SFP12 = 0x0130,
SFP13 = 0x0134,
SFP14 = 0x0138,
SFP15 = 0x013C,
SFP16 = 0x0140,
SFP17 = 0x0144,
SFP18 = 0x0148,
SFP19 = 0x014C,
SFP20 = 0x0150,
SFP21 = 0x0154,
SFP22 = 0x0158,
SFP23 = 0x015C,
SFP24 = 0x0160,
SFP25 = 0x0164,
SFP26 = 0x0168,
SFP27 = 0x016C,
SFP28 = 0x0170,
SFP29 = 0x0174,
SFP30 = 0x0178,
SFP31 = 0x017C,
SFM0 = 0x01C0,
SFM1 = 0x01C4,
TGC = 0x0300,
TCCR = 0x0304,
TSR = 0x0308,
TFA0 = 0x0310,
TFA1 = 0x0314,
TFA2 = 0x0318,
CIVR0 = 0x0320,
CIVR1 = 0x0324,
CDVR0 = 0x0328,
CDVR1 = 0x032C,
CUL0 = 0x0330,
CUL1 = 0x0334,
CLL0 = 0x0338,
CLL1 = 0x033C,
DIC = 0x0350,
DIS = 0x0354,
EIC = 0x0358,
EIS = 0x035C,
RIC0 = 0x0360,
RIS0 = 0x0364,
RIC1 = 0x0368,
RIS1 = 0x036C,
RIC2 = 0x0370,
RIS2 = 0x0374,
TIC = 0x0378,
TIS = 0x037C,
ISS = 0x0380,
GCCR = 0x0390,
GMTT = 0x0394,
GPTC = 0x0398,
GTI = 0x039C,
GTO0 = 0x03A0,
GTO1 = 0x03A4,
GTO2 = 0x03A8,
GIC = 0x03AC,
GIS = 0x03B0,
GCPT = 0x03B4, /* Undocumented? */
GCT0 = 0x03B8,
GCT1 = 0x03BC,
GCT2 = 0x03C0,
/* E-MAC registers */
ECMR = 0x0500,
RFLR = 0x0508,
ECSR = 0x0510,
ECSIPR = 0x0518,
PIR = 0x0520,
PSR = 0x0528,
PIPR = 0x052c,
MPR = 0x0558,
PFTCR = 0x055c,
PFRCR = 0x0560,
GECMR = 0x05b0,
MAHR = 0x05c0,
MALR = 0x05c8,
TROCR = 0x0700, /* Undocumented? */
CDCR = 0x0708, /* Undocumented? */
LCCR =