/*
* Copyright (c) 2017 Mellanox Technologies. All rights reserved.
*
* This software is available to you under a choice of one of two
* licenses. You may choose to be licensed under the terms of the GNU
* General Public License (GPL) Version 2, available from the file
* COPYING in the main directory of this source tree, or the
* OpenIB.org BSD license below:
*
* Redistribution and use in source and binary forms, with or
* without modification, are permitted provided that the following
* conditions are met:
*
* - Redistributions of source code must retain the above
* copyright notice, this list of conditions and the following
* disclaimer.
*
* - Redistributions in binary form must reproduce the above
* copyright notice, this list of conditions and the following
* disclaimer in the documentation and/or other materials
* provided with the distribution.
*
* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
* SOFTWARE.
*
*/
#include <net/addrconf.h>
#include <linux/etherdevice.h>
#include <linux/mlx5/vport.h>
#include "mlx5_core.h"
#include "lib/mlx5.h"
#include "fpga/conn.h"
#define MLX5_FPGA_PKEY 0xFFFF
#define MLX5_FPGA_PKEY_INDEX 0 /* RoCE PKEY 0xFFFF is always at index 0 */
#define MLX5_FPGA_RECV_SIZE 2048
#define MLX5_FPGA_PORT_NUM 1
#define MLX5_FPGA_CQ_BUDGET 64
static int mlx5_fpga_conn_map_buf(struct mlx5_fpga_conn *conn,
struct mlx5_fpga_dma_buf *buf)
{
struct device *dma_device;
int err = 0;
if (unlikely(!buf->sg[0].data))
goto out;
dma_device = &conn->fdev->mdev->pdev->dev;
buf->sg[0].dma_addr = dma_map_single(dma_device, buf->sg[0].data,
buf->sg[0].size, buf->dma_dir);
err = dma_mapping_error(dma_device, buf->sg[0].dma_addr);
if (unlikely(err)) {
mlx5_fpga_warn(conn->fdev, "DMA error on sg 0: %d\n", err);
err = -ENOMEM;
goto out;
}
if (!buf->sg[1].data)
goto out;
buf->sg[1].dma_addr = dma_map_single(dma_device, buf->sg[1].data,
buf->sg[1].size, buf->dma_dir);
err = dma_mapping_error(dma_device, buf->sg[1].dma_addr);
if (unlikely(err)) {
mlx5_fpga_warn(conn->fdev, "DMA error on sg 1: %d\n", err);
dma_unmap_single(dma_device, buf->sg[0].dma_addr,
buf->sg[0].size, buf->dma_dir);
err = -ENOMEM;
}
out:
return err;
}
static void mlx5_fpga_conn_unmap_buf(struct mlx5_fpga_conn *conn,
struct mlx5_fpga_dma_buf *buf)
{
struct device *dma_device;
dma_device = &conn->fdev->mdev->pdev->dev;
if (buf->sg[1].data)
dma_unmap_single(dma_device, buf->sg[1].dma_addr,
buf->sg[1].size, buf->dma_dir);
if (likely(buf->sg[0].data))
dma_unmap_single(dma_device, buf->sg[0].dma_addr,
buf->sg[0].size, buf->dma_dir);
}
static int mlx5_fpga_conn_post_recv(struct mlx5_fpga_conn *conn,
struct mlx5_fpga_dma_buf *buf)
{
struct mlx5_wqe_data_seg *data;
unsigned int ix;
int err = 0;
err = mlx5_fpga_conn_map_buf(conn, buf);
if (unlikely(err))
goto out;
if (unlikely(conn->qp.rq.pc - conn->qp.rq.cc >= conn->qp.rq.size)) {
mlx5_fpga_conn_unmap_buf(conn, buf);
return -EBUSY;
}
ix = conn->qp.rq.pc & (conn->qp.rq.size - 1);
data = mlx5_wq_cyc_get_wqe(&conn->qp.wq.rq, ix);
data->byte_count = cpu_to_be32(buf->sg[0].size);
data->lkey = cpu_to_be32(conn->fdev->conn_res.mkey.key);
data->addr = cpu_to_be64