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/*
* Copyright (c) 2014-2015 Hisilicon Limited.
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License as published by
* the Free Software Foundation; either version 2 of the License, or
* (at your option) any later version.
*/
#ifndef __HNAE_H
#define __HNAE_H
/* Names used in this framework:
* ae handle (handle):
* a set of queues provided by AE
* ring buffer queue (rbq):
* the channel between upper layer and the AE, can do tx and rx
* ring:
* a tx or rx channel within a rbq
* ring description (desc):
* an element in the ring with packet information
* buffer:
* a memory region referred by desc with the full packet payload
*
* "num" means a static number set as a parameter, "count" mean a dynamic
* number set while running
* "cb" means control block
*/
#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/device.h>
#include <linux/module.h>
#include <linux/netdevice.h>
#include <linux/notifier.h>
#include <linux/phy.h>
#include <linux/types.h>
#define HNAE_DRIVER_VERSION "2.0"
#define HNAE_DRIVER_NAME "hns"
#define HNAE_COPYRIGHT "Copyright(c) 2015 Huawei Corporation."
#define HNAE_DRIVER_STRING "Hisilicon Network Subsystem Driver"
#define HNAE_DEFAULT_DEVICE_DESCR "Hisilicon Network Subsystem"
#ifdef DEBUG
#ifndef assert
#define assert(expr) \
do { \
if (!(expr)) { \
pr_err("Assertion failed! %s, %s, %s, line %d\n", \
#expr, __FILE__, __func__, __LINE__); \
} \
} while (0)
#endif
#else
#ifndef assert
#define assert(expr)
#endif
#endif
#define AE_VERSION_1 ('6' << 16 | '6' << 8 | '0')
#define AE_VERSION_2 ('1' << 24 | '6' << 16 | '1' << 8 | '0')
#define AE_IS_VER1(ver) ((ver) == AE_VERSION_1)
#define AE_NAME_SIZE 16
#define BD_SIZE_2048_MAX_MTU 6000
/* some said the RX and TX RCB format should not be the same in the future. But
* it is the same now...
*/
#define RCB_REG_BASEADDR_L 0x00 /* P660 support only 32bit accessing */
#define RCB_REG_BASEADDR_H 0x04
#define RCB_REG_BD_NUM 0x08
#define RCB_REG_BD_LEN 0x0C
#define RCB_REG_PKTLINE 0x10
#define RCB_REG_TAIL 0x18
#define RCB_REG_HEAD 0x1C
#define RCB_REG_FBDNUM 0x20
#define RCB_REG_OFFSET 0x24 /* pkt num to be handled */
#define RCB_REG_PKTNUM_RECORD 0x2C /* total pkt received */
#define HNS_RX_HEAD_SIZE 256
#define HNAE_AE_REGISTER 0x1
#define RCB_RING_NAME_LEN (IFNAMSIZ + 4)
#define HNAE_LOWEST_LATENCY_COAL_PARAM 30
#define HNAE_LOW_LATENCY_COAL_PARAM 80
#define HNAE_BULK_LATENCY_COAL_PARAM 150
enum hnae_led_state {
HNAE_LED_INACTIVE,
HNAE_LED_ACTIVE,
HNAE_LED_ON,
HNAE_LED_OFF
};
#define HNS_RX_FLAG_VLAN_PRESENT 0x1
#define HNS_RX_FLAG_L3ID_IPV4 0x0
#define HNS_RX_FLAG_L3ID_IPV6 0x1
#define HNS_RX_FLAG_L4ID_UDP 0x0
#define HNS_RX_FLAG_L4ID_TCP 0x1
#define HNS_RX_FLAG_L4ID_SCTP 0x3
#define HNS_TXD_ASID_S 0
#define HNS_TXD_ASID_M (0xff << HNS_TXD_ASID_S)
#define HNS_TXD_BUFNUM_S 8
#define HNS_TXD_BUFNUM_M (0x3 << HNS_TXD_BUFNUM_S)
#define HNS_TXD_PORTID_S 10
#define HNS_TXD_PORTID_M (0x7 << HNS_TXD_PORTID_S)
#define HNS_TXD_RA_B 8
#define HNS_TXD_RI_B 9
#define HNS_TXD_L4CS_B 10
#define HNS_TXD_L3CS_B 11
#define HNS_TXD_FE_B 12
#define HNS_TXD_VLD_B 13
#define HNS_TXD_IPOFFSET_S 14
#define HNS_TXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
#define HNS_RXD_IPOFFSET_S 0
#define HNS_RXD_IPOFFSET_M (0xff << HNS_TXD_IPOFFSET_S)
#define HNS_RXD_BUFNUM_S 8
#define HNS_RXD_BUFNUM_M (0x3 << HNS_RXD_BUFNUM_S)
#define HNS_RXD_PORTID_S 10
#define HNS_RXD_PORTID_M (0x7 << HNS_RXD_PORTID_S)
#define HNS_RXD_DMAC_S 13
#define HNS_RXD_DMAC_M (0x3 << HNS_RXD_DMAC_S)
#define HNS_RXD_VLAN_S 15
#define HNS_RXD_VLAN_M (0x3 << HNS_RXD_VLAN_S)
#define HNS_RXD_L3ID_S 17
#define HNS_RXD_L3ID_M (0xf << HNS_RXD_L3ID_S)
#define HNS_RXD_L4ID_S 21
#define HNS_RXD_L4ID_M (0xf << HNS_RXD_L4ID_S)
#define HNS_RXD_FE_B 25
#define HNS_RXD_FRAG_B 26
#define HNS_RXD_VLD_B 27
#define HNS_RXD_L2E_B 28
#define HNS_RXD_L3E_B 29
#define HNS_RXD_L4E_B 30
#define HNS_RXD_DROP_B 31
#define HNS_RXD_VLANID_S 8
#define HNS_RXD_VLANID_M (0xfff << HNS_RXD_VLANID_S)
#define HNS_RXD_CFI_B 20
#define HNS_RXD_PRI_S 21
#define HNS_RXD_PRI_M (0x7 << HNS_RXD_PRI_S)
#define HNS_RXD_ASID_S 24
#define HNS_RXD_ASID_M (0xff << HNS_RXD_ASID_S)
#define HNSV2_TXD_BUFNUM_S 0
#define HNSV2_TXD_BUFNUM_M (0x7 << HNSV2_TXD_BUFNUM_S)
#define HNSV2_TXD_PORTID_S 4
#define HNSV2_TXD_PORTID_M (0X7 << HNSV2_TXD_PORTID_S)
#define HNSV2_TXD_RI_B 1
#define HNSV2_TXD_L4CS_B 2
#define HNSV2_TXD_L3CS_B 3
#define HNSV2_TXD_FE_B 4
#define HNSV2_TXD_VLD_B 5
#define HNSV2_TXD_TSE_B 0
#define HNSV2_TXD_VLAN_EN_B 1
#define HNSV2_TXD_SNAP_B 2
#define HNSV2_TXD_IPV6_B 3
#define HNSV2_TXD_SCTP_B 4
/* hardware spec ring buffer format */
struct __packed hnae_desc {
__le64 addr;
union {
struct {
union {
__le16 asid_bufnum_pid;
__le16 asid;
};
__le16 send_size;
union {
__le32 flag_ipoffset;
struct {
__u8 bn_pid;
__u8 ra_ri_cs_fe_vld;
__u8 ip_offset;
__u8 tse_vlan_snap_v6_sctp_nth;
};
};
__le16 mss;
__u8 l4_len;
__u8 reserved1;
__le16 paylen;
__u8 vmid;
__u8 qid;
__le32 reserved2[2];
} tx;
struct {
__le32 ipoff_bnum_pid_flag;
__le16 pkt_len;
__le16 size;
union {
__le32 vlan_pri_asid;
struct {
__le16 asid;
__le16 vlan_cfi_pri;
};
};
__le32 rss_hash;
__le32 reserved_1[2];
} rx;
};
};
struct hnae_desc_cb {
dma_addr_t dma; /* dma address of this desc */
void *buf; /* cpu addr for a desc */
/* priv data for the desc, e.g. skb when use with ip stack*/
void *priv;
u32 page_offset;
u32 length; /* length of the buffer */
u16 reuse_flag;
/* desc type, used by the ring user to mark the type of the priv data */
u16 type;
};
#define setflags(flags, bits) ((flags) |= (bits))
#define unsetflags(flags, bits) ((flags) &= ~(bits))
/* hnae_ring->flags fields */
#define RINGF_DIR 0x1 /* TX or RX ring, set if TX */
#define is_tx_ring(ring) ((ring)->flags & RINGF_DIR)
#define is_rx_ring(ring) (!is_tx_ring(ring))
#define ring_to_dma_dir(ring) (is_tx_ring(ring) ? \
DMA_TO_DEVICE : DMA_FROM_DEVICE)
struct ring_stats {
u64 io_err_cnt;
u64 sw_err_cnt;
u64 seg_pkt_cnt;
union {
struct {
u64 tx_pkts;
u64 tx_bytes;
u64 tx_err_cnt;
u64 restart_queue;
u64 tx_busy;
};
struct {
u64 rx_pkts;
u64 rx_bytes;
u64 rx_err_cnt;
u64 reuse_pg_cnt;
u64 err_pkt_len;
u64 non_vld_descs;
u64 err_bd_num;
u64 l2_err;
u64 l3l4_csum_err;
};
};
};
struct hnae_queue;
struct hnae_ring {
u8 __iomem *io_base; /* base io address for the ring */
struct hnae_desc *desc; /* dma map address space */
struct hnae_desc_cb *desc_cb;
struct hnae_queue *q;
int irq;
char ring_name[RCB_RING_NAME_LEN];
/* statistic */
struct ring_stats stats;
/* ring lock for poll one */
spinlock_t lock;
dma_addr_t desc_dma_addr;
u32 buf_size; /* size for hnae_desc->addr, preset by AE */
u16 desc_num; /* total number of desc */
u16 max_desc_num_per_pkt;
u16 max_raw_data_sz_per_desc;
u16 max_pkt_size;
int next_to_use; /* idx of next spare desc */
/* idx of lastest sent desc, the ring is empty when equal to
* next_to_use
*/
int next_to_clean;
int flags; /* ring attribute */
int irq_init_flag;
/* total rx bytes after last rx rate calucated */
u64 coal_last_rx_bytes;
unsigned long coal_last_jiffies;
u32 coal_param;
u32 coal_rx_rate; /* rx rate in MB */
};
#define ring_ptr_move_fw(ring, p) \
((ring)->p = ((ring)->p + 1) % (ring)->desc_num)
#define ring_ptr_move_bw(ring, p) \
((ring)->p = ((ring)->p - 1 + (ring)->desc_num) % (ring)->desc_num)
enum hns_desc_type {
DESC_TYPE_SKB,
DESC_TYPE_PAGE,
};
#define assert_is_ring_idx(ring, idx) \
assert((idx) >= 0 && (idx) < (ring)->desc_num)
/* the distance between [begin, end) in a ring buffer
* note: there is a unuse slot between the begin and the end
*/
static inline int ring_dist(struct hnae_ring *ring, int begin, int end)
{
assert_is_ring_idx(ring, begin);
assert_is_ring_idx(ring, end);
return (end - begin + ring->desc_num) % ring->desc_num;
}
static inline int ring_space(struct hnae_ring *ring)
{
return ring->desc_num -
ring_dist(ring, ring->next_to_clean, ring->next_to_use) - 1;
}
static inline int is_ring_empty(struct hnae_ring *ring)
{
assert_is_ring_idx(ring, ring->next_to_use);
assert_is_ring_idx(ring, ring->next_to_clean);
return ring->next_to_use == ring->next_to_clean;
}
#define hnae_buf_size(_ring) ((_ring)->buf_size)
#define hnae_page_order(_ring) (get_order(hnae_buf_size(_ring)))
#define hnae_page_size(_ring) (PAGE_SIZE << hnae_page_order(_ring))
struct hnae_handle;
/* allocate and dma map space for hnae desc */
struct hnae_buf_ops {
int (*alloc_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
void (*free_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
int (*map_buffer)(struct hnae_ring *ring, struct hnae_desc_cb *cb);
void (*unmap_buffer)(struct
|