path: root/drivers/net/ethernet/emulex/benet/be.h

/*
 * Copyright (C) 2005 - 2014 Emulex
 * All rights reserved.
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License version 2
 * as published by the Free Software Foundation.  The full GNU General
 * Public License is included in this distribution in the file called COPYING.
 *
 * Contact Information:
 * linux-drivers@emulex.com
 *
 * Emulex
 * 3333 Susan Street
 * Costa Mesa, CA 92626
 */

#ifndef BE_H
#define BE_H

#include <linux/pci.h>
#include <linux/etherdevice.h>
#include <linux/delay.h>
#include <net/tcp.h>
#include <net/ip.h>
#include <net/ipv6.h>
#include <linux/if_vlan.h>
#include <linux/workqueue.h>
#include <linux/interrupt.h>
#include <linux/firmware.h>
#include <linux/slab.h>
#include <linux/u64_stats_sync.h>

#include "be_hw.h"
#include "be_roce.h"

#define DRV_VER			"10.4u"
#define DRV_NAME		"be2net"
#define BE_NAME			"Emulex BladeEngine2"
#define BE3_NAME		"Emulex BladeEngine3"
#define OC_NAME			"Emulex OneConnect"
#define OC_NAME_BE		OC_NAME	"(be3)"
#define OC_NAME_LANCER		OC_NAME "(Lancer)"
#define OC_NAME_SH		OC_NAME "(Skyhawk)"
#define DRV_DESC		"Emulex OneConnect NIC Driver"

#define BE_VENDOR_ID 		0x19a2
#define EMULEX_VENDOR_ID	0x10df
#define BE_DEVICE_ID1		0x211
#define BE_DEVICE_ID2		0x221
#define OC_DEVICE_ID1		0x700	/* Device Id for BE2 cards */
#define OC_DEVICE_ID2		0x710	/* Device Id for BE3 cards */
#define OC_DEVICE_ID3		0xe220	/* Device id for Lancer cards */
#define OC_DEVICE_ID4           0xe228   /* Device id for VF in Lancer */
#define OC_DEVICE_ID5		0x720	/* Device Id for Skyhawk cards */
#define OC_DEVICE_ID6		0x728   /* Device id for VF in SkyHawk */
#define OC_SUBSYS_DEVICE_ID1	0xE602
#define OC_SUBSYS_DEVICE_ID2	0xE642
#define OC_SUBSYS_DEVICE_ID3	0xE612
#define OC_SUBSYS_DEVICE_ID4	0xE652

/* Number of bytes of an RX frame that are copied to skb->data */
#define BE_HDR_LEN		((u16) 64)
/* allocate extra space to allow tunneling decapsulation without head reallocation */
#define BE_RX_SKB_ALLOC_SIZE (BE_HDR_LEN + 64)

#define BE_MAX_JUMBO_FRAME_SIZE	9018
#define BE_MIN_MTU		256
#define BE_MAX_MTU              (BE_MAX_JUMBO_FRAME_SIZE -	\
				 (ETH_HLEN + ETH_FCS_LEN))

#define BE_NUM_VLANS_SUPPORTED	64
#define BE_MAX_EQD		128u
#define	BE_MAX_TX_FRAG_COUNT	30

#define EVNT_Q_LEN		1024
#define TX_Q_LEN		2048
#define TX_CQ_LEN		1024
#define RX_Q_LEN		1024	/* Does not support any other value */
#define RX_CQ_LEN		1024
#define MCC_Q_LEN		128	/* total size not to exceed 8 pages */
#define MCC_CQ_LEN		256

#define BE2_MAX_RSS_QS		4
#define BE3_MAX_RSS_QS		16
#define BE3_MAX_TX_QS		16
#define BE3_MAX_EVT_QS		16
#define BE3_SRIOV_MAX_EVT_QS	8

#define MAX_RX_QS		32
#define MAX_EVT_QS		32
#define MAX_TX_QS		32

#define MAX_ROCE_EQS		5
#define MAX_MSIX_VECTORS	32
#define MIN_MSIX_VECTORS	1
#define BE_NAPI_WEIGHT		64
#define MAX_RX_POST		BE_NAPI_WEIGHT /* Frags posted at a time */
#define RX_FRAGS_REFILL_WM	(RX_Q_LEN - MAX_RX_POST)

#define MAX_VFS			30 /* Max VFs supported by BE3 FW */
#define FW_VER_LEN		32

#define	RSS_INDIR_TABLE_LEN	128
#define RSS_HASH_KEY_LEN	40

struct be_dma_mem {
	void *va;
	dma_addr_t dma;
	u32 size;
};

struct be_queue_info {
	struct be_dma_mem dma_mem;
	u16 len;
	u16 entry_size;	/* Size of an element in the queue */
	u16 id;
	u16 tail, head;
	bool created;
	atomic_t used;	/* Number of valid elements in the queue */
};

static inline u32 MODULO(u16 val, u16 limit)
{
	BUG_ON(limit & (limit - 1));
	return val & (limit - 1);
}

static inline void index_adv(u16 *index, u16 val, u16 limit)
{
	*index = MODULO((*index + val), limit);
}

static inline void index_inc(u16 *index, u16 limit)
{
	*index = MODULO((*index + 1), limit);
}

static inline void *queue_head_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->head * q->entry_size;
}

static inline void *queue_tail_node(struct be_queue_info *q)
{
	return q->dma_mem.va + q->tail * q->entry_size;
}

static inline void *queue_index_node(struct be_queue_info *q, u16 index)
{
	return q->dma_mem.va + index * q->entry_size;
}

static inline void queue_head_inc(struct be_queue_info *q)
{
	index_inc(&q->head, q->len);
}

static inline void index_dec(u16 *index, u16 limit)
{
	*index = MODULO((*index - 1), limit);
}

static inline void queue_tail_inc(struct be_queue_info *q)
{
	index_inc(&q->tail, q->len);
}

struct be_eq_obj {
	struct be_queue_info q;
	char desc[32];

	/* Adaptive interrupt coalescing (AIC) info */
	bool enable_aic;
	u32 min_eqd;		/* in usecs */
	u32 max_eqd;		/* in usecs */
	u32 eqd;		/* configured val when aic is off */
	u32 cur_eqd;		/* in usecs */

	u8 idx;			/* array index */
	u8 msix_idx;
	u16 spurious_intr;
	struct napi_struct napi;
	struct be_adapter *adapter;

#ifdef CONFIG_NET_RX_BUSY_POLL
#define BE_EQ_IDLE		0
#define BE_EQ_NAPI		1	/* napi owns this EQ */
#define BE_EQ_POLL		2	/* poll owns this EQ */
#define BE_EQ_LOCKED		(BE_EQ_NAPI | BE_EQ_POLL)
#define BE_EQ_NAPI_YIELD	4	/* napi yielded this EQ */
#define BE_EQ_POLL_YIELD	8	/* poll yielded this EQ */
#define BE_EQ_YIELD		(BE_EQ_NAPI_YIELD | BE_EQ_POLL_YIELD)
#define BE_EQ_USER_PEND		(BE_EQ_POLL | BE_EQ_POLL_YIELD)
	unsigned int state;
	spinlock_t lock;	/* lock to serialize napi and busy-poll */
#endif  /* CONFIG_NET_RX_BUSY_POLL */
} ____cacheline_aligned_in_smp;

struct be_aic_obj {		/* Adaptive interrupt coalescing (AIC) info */
	bool enable;
	u32 min_eqd;		/* in usecs */
	u32 max_eqd;		/* in usecs */
	u32 prev_eqd;		/* in usecs */
	u32 et_eqd;		/* configured val when aic is off */
	ulong jiffies;
	u64 rx_pkts_prev;	/* Used to calculate RX pps */
	u64 tx_reqs_prev;	/* Used to calculate TX pps */
};

enum {
	NAPI_POLLING,
	BUSY_POLLING
};

struct be_mcc_obj {
	struct be_queue_info q;
	struct be_queue_info cq;
	bool rearm_cq;
};

struct be_tx_stats {
	u64 tx_bytes;
	u64 tx_pkts;
	u64 tx_reqs;
	u64 tx_compl;
	ulong tx_jiffies;
	u32 tx_stops;
	u32 tx_drv_drops;	/* pkts dropped by driver */
	/* the error counters are described in be_ethtool.c */
	u32 tx_hdr_parse_err;
	u32 tx_dma_err;
	u32 tx_tso_err;
	u32 tx_spoof_check_err;
	u32 tx_qinq_err;
	u32 tx_internal_parity_err;
	struct u64_stats_sync sync;
	struct u64_stats_sync sync_compl;
};

struct be_tx_obj {
	u32 db_offset;
	struct be_queue_info q;
	struct be_queue_info cq;
	/* Remember the skbs that were transmitted */
	struct sk_buff *sent_skb_list[TX_Q_LEN];
	struct be_tx_stats stats;
	u16 pend_wrb_cnt;	/* Number of WRBs yet to be given to HW */
	u16 last_req_wrb_cnt;	/* wrb cnt of the last req in the Q */
	u16 last_req_hdr;	/* index of the last req's hdr-wrb */
} ____cacheline_aligned_in_smp;

/* Struct to remember the pages posted for rx frags */
struct be_rx_page_info {
	struct page *page;
	/* set to page-addr for last frag of the page & frag-addr otherwise */
	DEFINE_DMA_UNMAP_ADDR(bus);
	u16 page_offset;
	bool last_frag;		/* last frag of the page */
};

struct be_rx_stats {
	u64 rx_bytes;
	u64 rx_pkts;
	u32 rx_drops_no_skbs;	/* skb allocation errors */
	u32 rx_drops_no_frags;	/* HW has no fetched frags */
	u32 rx_post_fail;	/* page post alloc failures */
	u32 rx_compl;