path: root/drivers/net/ethernet/brocade/bna/bfi_enet.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * Linux network driver for QLogic BR-series Converged Network Adapter.
 */
/*
 * Copyright (c) 2005-2014 Brocade Communications Systems, Inc.
 * Copyright (c) 2014-2015 QLogic Corporation
 * All rights reserved
 * www.qlogic.com
 */

/* BNA Hardware and Firmware Interface */

/* Skipping statistics collection to avoid clutter.
 * Command is no longer needed:
 *	MTU
 *	TxQ Stop
 *	RxQ Stop
 *	RxF Enable/Disable
 *
 * HDS-off request is dynamic
 * keep structures as multiple of 32-bit fields for alignment.
 * All values must be written in big-endian.
 */
#ifndef __BFI_ENET_H__
#define __BFI_ENET_H__

#include "bfa_defs.h"
#include "bfi.h"

#define BFI_ENET_CFG_MAX		32	/* Max resources per PF */

#define BFI_ENET_TXQ_PRIO_MAX		8
#define BFI_ENET_RX_QSET_MAX		16
#define BFI_ENET_TXQ_WI_VECT_MAX	4

#define BFI_ENET_VLAN_ID_MAX		4096
#define BFI_ENET_VLAN_BLOCK_SIZE	512	/* in bits */
#define BFI_ENET_VLAN_BLOCKS_MAX					\
	(BFI_ENET_VLAN_ID_MAX / BFI_ENET_VLAN_BLOCK_SIZE)
#define BFI_ENET_VLAN_WORD_SIZE		32	/* in bits */
#define BFI_ENET_VLAN_WORDS_MAX						\
	(BFI_ENET_VLAN_BLOCK_SIZE / BFI_ENET_VLAN_WORD_SIZE)

#define BFI_ENET_RSS_RIT_MAX		64	/* entries */
#define BFI_ENET_RSS_KEY_LEN		10	/* 32-bit words */

union bfi_addr_be_u {
	struct {
		u32	addr_hi;	/* Most Significant 32-bits */
		u32	addr_lo;	/* Least Significant 32-Bits */
	} __packed a32;
} __packed;

/*	T X   Q U E U E   D E F I N E S      */
/* TxQ Vector (a.k.a. Tx-Buffer Descriptor) */
/* TxQ Entry Opcodes */
#define BFI_ENET_TXQ_WI_SEND		(0x402)	/* Single Frame Transmission */
#define BFI_ENET_TXQ_WI_SEND_LSO	(0x403)	/* Multi-Frame Transmission */
#define BFI_ENET_TXQ_WI_EXTENSION	(0x104)	/* Extension WI */

/* TxQ Entry Control Flags */
#define BFI_ENET_TXQ_WI_CF_FCOE_CRC	BIT(8)
#define BFI_ENET_TXQ_WI_CF_IPID_MODE	BIT(5)
#define BFI_ENET_TXQ_WI_CF_INS_PRIO	BIT(4)
#define BFI_ENET_TXQ_WI_CF_INS_VLAN	BIT(3)
#define BFI_ENET_TXQ_WI_CF_UDP_CKSUM	BIT(2)
#define BFI_ENET_TXQ_WI_CF_TCP_CKSUM	BIT(1)
#define BFI_ENET_TXQ_WI_CF_IP_CKSUM	BIT(0)

struct bfi_enet_txq_wi_base {
	u8			reserved;
	u8			num_vectors;	/* number of vectors present */
	u16			opcode;
			/* BFI_ENET_TXQ_WI_SEND or BFI_ENET_TXQ_WI_SEND_LSO */
	u16			flags;		/* OR of all the flags */
	u16			l4_hdr_size_n_offset;
	u16			vlan_tag;
	u16			lso_mss;	/* Only 14 LSB are valid */
	u32			frame_length;	/* Only 24 LSB are valid */
} __packed;

struct bfi_enet_txq_wi_ext {
	u16			reserved;
	u16			opcode;		/* BFI_ENET_TXQ_WI_EXTENSION */
	u32			reserved2[3];
} __packed;

struct bfi_enet_txq_wi_vector {			/* Tx Buffer Descriptor */
	u16			reserved;
	u16			length;		/* Only 14 LSB are valid */
	union bfi_addr_be_u	addr;
} __packed;

/*  TxQ Entry Structure  */
struct bfi_enet_txq_entry {
	union {
		struct bfi_enet_txq_wi_base	base;
		struct bfi_enet_txq_wi_ext	ext;
	} __packed wi;
	struct bfi_enet_txq_wi_vector vector[BFI_ENET_TXQ_WI_VECT_MAX];
} __packed;

#define wi_hdr		wi.base
#define wi_ext_hdr	wi.ext

#define BFI_ENET_TXQ_WI_L4_HDR_N_OFFSET(_hdr_size, _offset) \
		(((_hdr_size) << 10) | ((_offset) & 0x3FF))

/*   R X   Q U E U E   D E F I N E S   */
struct bfi_enet_rxq_entry {
	union bfi_addr_be_u  rx_buffer;
} __packed;

/*   R X   C O M P L E T I O N   Q U E U E   D E F I N E S   */
/* CQ Entry Flags */
#define BFI_ENET_CQ_EF_MAC_ERROR	BIT(0)
#define BFI_ENET_CQ_EF_FCS_ERROR	BIT(1)
#define BFI_ENET_CQ_EF_TOO_LONG		BIT(2)
#define BFI_ENET_CQ_EF_FC_CRC_OK	BIT(3)

#define BFI_ENET_CQ_EF_RSVD1		BIT(4)
#define BFI_ENET_CQ_EF_L4_CKSUM_OK	BIT(5)
#define BFI_ENET_CQ_EF_L3_CKSUM_OK	BIT(6)
#define BFI_ENET_CQ_EF_HDS_HEADER	BIT(7)

#define BFI_ENET_CQ_EF_UDP		BIT(8)
#define BFI_ENET_CQ_EF_TCP		BIT(9)
#define BFI_ENET_CQ_EF_IP_OPTIONS	BIT(10)
#define BFI_ENET_CQ_EF_IPV6		BIT(11)

#define BFI_ENET_CQ_EF_IPV4		BIT(12)
#define BFI_ENET_CQ_EF_VLAN		BIT(13)
#define BFI_ENET_CQ_EF_RSS		BIT(14)
#define BFI_ENET_CQ_EF_RSVD2		BIT(15)

#define BFI_ENET_CQ_EF_MCAST_MATCH	BIT(16)
#define BFI_ENET_CQ_EF_MCAST		BIT(17)
#define BFI_ENET_CQ_EF_BCAST		BIT(18)
#define BFI_ENET_CQ_EF_REMOTE		BIT(19)

#define BFI_ENET_CQ_EF_LOCAL		BIT(20)

/* CQ Entry Structure */
struct bfi_enet_cq_entry {
	u32 flags;
	u16	vlan_tag;
	u16	length;
	u32	rss_hash;
	u8	valid;
	u8	reserved1;
	u8	reserved2;
	u8	rxq_id;
} __packed;

/*   E N E T   C O N T R O L   P A T H   C O M M A N D S   */
struct bfi_enet_q {
	union bfi_addr_u	pg_tbl;
	union bfi_addr_u	first_entry;
	u16		pages;	/* # of pages */
	u16		page_sz;
} __packed;

struct bfi_enet_txq {
	struct bfi_enet_q	q;
	u8			priority;
	u8			rsvd[3];
} __packed;

struct bfi_enet_rxq {
	struct bfi_enet_q	q;
	u16		rx_buffer_size;
	u16		rsvd;
} __packed;

struct bfi_enet_cq {
	struct bfi_enet_q	q;
} __packed;

struct bfi_enet_ib_cfg {
	u8		int_pkt_dma;
	u8		int_enabled;
	u8		int_pkt_enabled;
	u8		continuous_coalescing;
	u8		msix;
	u8		rsvd[3];
	u32	coalescing_timeout;
	u32	inter_pkt_timeout;
	u8		inter_pkt_count;
	u8		rsvd1[3];
} __packed;

struct bfi_enet_ib {
	union bfi_addr_u	index_addr;
	union {
		u16	msix_index;
		u16	intx_bitmask;
	} __packed intr;
	u16		rsvd;
} __packed;

/* ENET command messages */
enum bfi_enet_h2i_msgs {
	/* Rx Commands */
	BFI_ENET_H2I_RX_CFG_SET_REQ = 1,
	BFI_ENET_H2I_RX_CFG_CLR_REQ = 2,

	BFI_ENET_H2I_RIT_CFG_REQ = 3,
	BFI_ENET_H2I_RSS_CFG_REQ = 4,
	BFI_ENET_H2I_RSS_ENABLE_REQ = 5,
	BFI_ENET_H2I_RX_PROMISCUOUS_REQ = 6,
	BFI_ENET_H2I_RX_DEFAULT_REQ = 7,

	BFI_ENET_H2I_MAC_UCAST_SET_REQ = 8,
	BFI_ENET_H2I_MAC_UCAST_CLR_REQ = 9,
	BFI_ENET_H2I_MAC_UCAST_ADD_REQ = 10,
	BFI_ENET_H2I_MAC_UCAST_DEL_REQ = 11,

	BFI_ENET_H2I_MAC_MCAST_ADD_REQ = 12,
	BFI_ENET_H2I_MAC_MCAST_DEL_REQ = 13,
	BFI_ENET_H2I_MAC_MCAST_FILTER_REQ = 14,

	BFI_ENET_H2I_RX_VLAN_SET_REQ = 15,
	BFI_ENET_H2I_RX_VLAN_STRIP_ENABLE_REQ = 16,

	/* Tx Commands */
	BFI_ENET_H2I_TX_CFG_SET_REQ = 17,
	BFI_ENET_H2I_TX_CFG_CLR_REQ = 18,

	/* Port Commands */
	BFI_ENET_H2I_PORT_ADMIN_UP_REQ = 19,
	BFI_ENET_H2I_SET_PAUSE_REQ = 20,
	BFI_ENET_H2I_DIAG_LOOPBACK_REQ = 21,

	/* Get Attributes Command */
	BFI_ENET_H2I_GET_ATTR_REQ = 22,

	/*  Statistics Commands */
	BFI_ENET_H2I_STATS_GET_REQ = 23,
	BFI_ENET_H2I_STATS_CLR_REQ = 24,

	BFI_ENET_H2I_WOL_MAGIC_REQ = 25,
	BFI_ENET_H2I_WOL_FRAME_REQ = 26,

	BFI_ENET_H2I_MAX = 27,
};

enum bfi_enet_i2h_msgs {
	/* Rx Responses */
	BFI_ENET_I2H_RX_CFG_SET_RSP =
		BFA_I2HM(BFI_ENET_H2I_RX_CFG_SET_REQ),
	BFI_ENET_I2H_RX_CFG_CLR_RSP =
		BFA_I2HM(BFI_ENET_H2I_RX_CFG_CLR_REQ),

	BFI_ENET_I2H_RIT_CFG_RSP =
		BFA_I2HM(BFI_ENET_H2I_RIT_CFG_REQ),
	BFI_ENET_I2H_RSS_CFG_RSP =
		BFA_I2HM(BFI_ENET_H2I_RSS_CFG_REQ),
	BFI_ENET_I2H_RSS_ENABLE_RSP =
		BFA_I2HM(BFI_ENET_H2I_RSS_ENABLE_REQ),
	BFI_ENET_I2H_RX_PROMISCUOUS_RSP =
		BFA_I2HM(BFI_ENET_H2I_RX_PROMISCUOUS_REQ),
	BFI_ENET_I2H_RX_DEFAULT_RSP =
		BFA_I2HM(BFI_ENET_H2I_RX_DEFAULT_REQ),

	BFI_ENET_I2H_MAC_UCAST_SET_RSP =
		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_SET_REQ),
	BFI_ENET_I2H_MAC_UCAST_CLR_RSP =
		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_CLR_REQ),
	BFI_ENET_I2H_MAC_UCAST_ADD_RSP =
		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_ADD_REQ),
	BFI_ENET_I2H_MAC_UCAST_DEL_RSP =
		BFA_I2HM(BFI_ENET_H2I_MAC_UCAST_DEL_REQ),

	BFI_ENET_I2H_MAC_MCAST_ADD_RSP =
		BFA_I2HM(BFI_ENET_H2I_MA