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/* SPDX-License-Identifier: GPL-2.0-only */
/*
* aQuantia Corporation Network Driver
* Copyright (C) 2014-2019 aQuantia Corporation. All rights reserved
*/
/* File hw_atl_utils.h: Declaration of common functions for Atlantic hardware
* abstraction layer.
*/
#ifndef HW_ATL_UTILS_H
#define HW_ATL_UTILS_H
#define HW_ATL_FLUSH() { (void)aq_hw_read_reg(self, 0x10); }
/* Hardware tx descriptor */
struct __packed hw_atl_txd_s {
u64 buf_addr;
u32 ctl;
u32 ctl2; /* 63..46 - payload length, 45 - ctx enable, 44 - ctx index */
};
/* Hardware tx context descriptor */
struct __packed hw_atl_txc_s {
u32 rsvd;
u32 len;
u32 ctl;
u32 len2;
};
/* Hardware rx descriptor */
struct __packed hw_atl_rxd_s {
u64 buf_addr;
u64 hdr_addr;
};
/* Hardware rx descriptor writeback */
struct __packed hw_atl_rxd_wb_s {
u32 type;
u32 rss_hash;
u16 status;
u16 pkt_len;
u16 next_desc_ptr;
u16 vlan;
};
/* Hardware rx HW TIMESTAMP writeback */
struct __packed hw_atl_rxd_hwts_wb_s {
u32 sec_hw;
u32 ns;
u32 sec_lw0;
u32 sec_lw1;
};
struct __packed hw_atl_stats_s {
u32 uprc;
u32 mprc;
u32 bprc;
u32 erpt;
u32 uptc;
u32 mptc;
u32 bptc;
u32 erpr;
u32 mbtc;
u32 bbtc;
u32 mbrc;
u32 bbrc;
u32 ubrc;
u32 ubtc;
u32 dpc;
};
union __packed ip_addr {
struct {
u8 addr[16];
} v6;
struct {
u8 padding[12];
u8 addr[4];
} v4;
};
struct __packed hw_atl_utils_fw_rpc {
u32 msg_id;
union {
struct {
u32 pong;
} msg_ping;
struct {
u8 mac_addr[6];
u32 ip_addr_cnt;
struct {
union ip_addr addr;
union ip_addr mask;
} ip[1];
} msg_arp;
struct {
u32 len;
u8 packet[1514U];
} msg_inject;
struct {
u32 priority;
u32 wol_packet_type;
u32 pattern_id;
u32 next_wol_pattern_offset;
union {
struct {
u32 flags;
u8 ipv4_source_address[4];
u8 ipv4_dest_address[4];
u16 tcp_source_port_number;
u16 tcp_dest_port_number;
} ipv4_tcp_syn_parameters;
struct {
u32 flags;
u8 ipv6_source_address[16];
u8 ipv6_dest_address[16];
u16 tcp_source_port_number;
u16 tcp_dest_port_number;
} ipv6_tcp_syn_parameters;
struct {
u32 flags;
} eapol_request_id_message_parameters;
struct {
u32 flags;
u32 mask_offset;
u32 mask_size;
u32 pattern_offset;
u32 pattern_size;
} wol_bit_map_pattern;
struct {
u8 mac_addr[ETH_ALEN];
} wol_magic_packet_patter;
} wol_pattern;
} msg_wol;
struct {
union {
u32 pattern_mask;
struct {
u32 reason_arp_v4_pkt : 1;
u32 reason_ipv4_ping_pkt : 1;
u32 reason_ipv6_ns_pkt : 1;
u32 reason_ipv6_ping_pkt : 1;
u32 reason_link_up : 1;
u32 reason_link_down : 1;
u32 reason_maximum : 1;
};
};
union {
u32 offload_mask;
};
} msg_enable_wakeup;
struct {
u32 id;
} msg_del_id;
};
};
struct __packed hw_atl_utils_mbox_header {
u32 version;
u32 transaction_id;
u32 error;
};
struct __packed hw_aq_ptp_offset {
u16 ingress_100;
u16 egress_100;
u16 ingress_1000;
u16 egress_1000;
u16 ingress_2500;
u16 egress_2500;
u16 ingress_5000;
u16 egress_5000;
u16 ingress_10000;
u16 egress_10000;
};
enum gpio_pin_function {
GPIO_PIN_FUNCTION_NC,
GPIO_PIN_FUNCTION_VAUX_ENABLE,
GPIO_PIN_FUNCTION_EFUSE_BURN_ENABLE,
GPIO_PIN_FUNCTION_SFP_PLUS_DETECT,
GPIO_PIN_FUNCTION_TX_DISABLE,
GPIO_PIN_FUNCTION_RATE_SEL_0,
GPIO_PIN_FUNCTION_RATE_SEL_1,
GPIO_PIN_FUNCTION_TX_FAULT,
GPIO_PIN_FUNCTION_PTP0,
GPIO_PIN_FUNCTION_PTP1,
GPIO_PIN_FUNCTION_PTP2,
GPIO_PIN_FUNCTION_SIZE
};
struct __packed hw_aq_info {
u8 reserved[6];
u16 phy_fault_code;
u16 phy_temperature;
u8 cable_len;
u8 reserved1;
u32 cable_diag_data[4];
struct hw_aq_ptp_offset ptp_offset;
u8 reserved2[12];
u32 caps_lo;
u32 caps_hi;
u32 reserved_datapath;
u32 reserved3[7];
u32 reserved_simpleresp[3];
u32 reserved_linkstat[7];
u32 reserved_wakes_count;
u32 reserved_eee_stat[12];
u32 tx_stuck_cnt;
u32 setting_address;
u32 setting_length;
u32 caps_ex;
enum gpio_pin_function gpio_pin[3];
u32 pcie_aer_dump[18];
u16 snr_margin[4];
};
struct __packed hw_atl_utils_mbox {
struct hw_atl_utils_mbox_header header;
struct hw_atl_stats_s stats;
struct hw_aq_info info;
};
/* fw2x */
typedef u32 fw_offset_t;
struct __packed offload_ip_info {
u8 v4_local_addr_count;
u8 v4_addr_count;
u8 v6_local_addr_count;
u8 v6_addr_count;
fw_offset_t v4_addr;
fw_offset_t v4_prefix;
fw_offset_t v6_addr;
fw_offset_t v6_prefix;
};
struct __packed offload_port_info {
u16 udp_port_count;
u16 tcp_port_count;
fw_offset_t udp_port;
fw_offset_t tcp_port;
};
struct __packed offload_ka_info {
u16 v4_ka_count;
u16 v6_ka_count;
u32 retry_count;
u32 retry_interval;
fw_offset_t v4_ka;
fw_offset_t v6_ka;
};
struct __packed offload_rr_info {
u32 rr_count;
u32 rr_buf_len;
fw_offset_t rr_id_x;
fw_offset_t rr_buf;
};
struct __packed offload_info {
u32 version;
u32 len;
u8 mac_addr[ETH_ALEN];
u8 reserved[2];
struct offload_ip_info ips;
struct offload_port_info ports;
struct offload_ka_info kas;
struct offload_rr_info rrs;
u8 buf[0];
};
/* Mailbox FW Request interface */
struct __packed hw_fw_request_ptp_adj_freq {
u32 ns_mac;
u32 fns_mac;
u32 ns_phy;
u32 fns_phy;
u32 mac_ns_adj;
u32 mac_fns_adj;
};
struct __packed hw_fw_request_ptp_adj_clock {
u32 ns;
u32 sec;
int sign;
};
#define HW_AQ_FW_REQUEST_PTP_ADJ_FREQ 0x12
#define HW_AQ_FW_REQUEST_PTP_ADJ_CLOCK 0x13
struct __packed hw_fw_request_iface {
u32 msg_id;
union {
/* PTP FW Request */
struct hw_fw_request_ptp_adj_freq ptp_adj_freq;
struct hw_fw_request_ptp_adj_clock ptp_adj_clock;
};
};
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