// SPDX-License-Identifier: GPL-2.0
/*
* Copyright (C) 2016-2017 Micron Technology, Inc.
*
* Authors:
* Peter Pan <peterpandong@micron.com>
* Boris Brezillon <boris.brezillon@bootlin.com>
*/
#define pr_fmt(fmt) "spi-nand: " fmt
#include <linux/device.h>
#include <linux/jiffies.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/mtd/spinand.h>
#include <linux/of.h>
#include <linux/slab.h>
#include <linux/spi/spi.h>
#include <linux/spi/spi-mem.h>
static void spinand_cache_op_adjust_colum(struct spinand_device *spinand,
const struct nand_page_io_req *req,
u16 *column)
{
struct nand_device *nand = spinand_to_nand(spinand);
unsigned int shift;
if (nand->memorg.planes_per_lun < 2)
return;
/* The plane number is passed in MSB just above the column address */
shift = fls(nand->memorg.pagesize);
*column |= req->pos.plane << shift;
}
static int spinand_read_reg_op(struct spinand_device *spinand, u8 reg, u8 *val)
{
struct spi_mem_op op = SPINAND_GET_FEATURE_OP(reg,
spinand->scratchbuf);
int ret;
ret = spi_mem_exec_op(spinand->spimem, &op);
if (ret)
return ret;
*val = *spinand->scratchbuf;
return 0;
}
static int spinand_write_reg_op(struct spinand_device *spinand, u8 reg, u8 val)
{
struct spi_mem_op op = SPINAND_SET_FEATURE_OP(reg,
spinand->scratchbuf);
*spinand->scratchbuf = val;
return spi_mem_exec_op(spinand->spimem, &op);
}
static int spinand_read_status(struct spinand_device *spinand, u8 *status)
{
return spinand_read_reg_op(spinand, REG_STATUS, status);
}
static int spinand_get_cfg(struct spinand_device *spinand, u8 *cfg)
{
struct nand_device *nand = spinand_to_nand(spinand);
if (WARN_ON(spinand->cur_target < 0 ||
spinand->cur_target >= nand->memorg.ntargets))
return -EINVAL;
*cfg = spinand->cfg_cache[spinand->cur_target];
return 0;
}
static int spinand_set_cfg(struct spinand_device *spinand, u8 cfg)
{
struct nand_device *nand = spinand_to_nand(spinand);
int ret;
if (WARN_ON(spinand->cur_target < 0 ||
spinand->cur_target >= nand->memorg.ntargets))
return -EINVAL;
if (spinand->cfg_cache[spinand->cur_target] == cfg)
return 0;
ret = spinand_write_reg_op(spinand, REG_CFG, cfg);
if (ret)
return ret;
spinand->cfg_cache[spinand->cur_target] = cfg;
return 0;
}
/**
* spinand_upd_cfg() - Update the configuration register
* @spinand: the spinand device
* @mask: the mask encoding the bits to update in the config reg
* @val: the new value to apply
*
* Update the configuration register.
*
* Return: 0 on success, a negative error code otherwise.
*/
int spinand_upd_cfg(struct spinand_device *spinand, u8 mask, u8 val)
{
int ret;
u8 cfg;
ret = spinand_get_cfg(spinand, &cfg);
if