// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
* Amlogic Meson Nand Flash Controller Driver
*
* Copyright (c) 2018 Amlogic, inc.
* Author: Liang Yang <liang.yang@amlogic.com>
*/
#include <linux/platform_device.h>
#include <linux/dma-mapping.h>
#include <linux/interrupt.h>
#include <linux/clk.h>
#include <linux/mtd/rawnand.h>
#include <linux/mtd/mtd.h>
#include <linux/mfd/syscon.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/module.h>
#include <linux/iopoll.h>
#include <linux/of.h>
#include <linux/of_device.h>
#include <linux/sched/task_stack.h>
#define NFC_REG_CMD 0x00
#define NFC_CMD_IDLE (0xc << 14)
#define NFC_CMD_CLE (0x5 << 14)
#define NFC_CMD_ALE (0x6 << 14)
#define NFC_CMD_ADL ((0 << 16) | (3 << 20))
#define NFC_CMD_ADH ((1 << 16) | (3 << 20))
#define NFC_CMD_AIL ((2 << 16) | (3 << 20))
#define NFC_CMD_AIH ((3 << 16) | (3 << 20))
#define NFC_CMD_SEED ((8 << 16) | (3 << 20))
#define NFC_CMD_M2N ((0 << 17) | (2 << 20))
#define NFC_CMD_N2M ((1 << 17) | (2 << 20))
#define NFC_CMD_RB BIT(20)
#define NFC_CMD_SCRAMBLER_ENABLE BIT(19)
#define NFC_CMD_SCRAMBLER_DISABLE 0
#define NFC_CMD_SHORTMODE_DISABLE 0
#define NFC_CMD_RB_INT BIT(14)
#define NFC_CMD_GET_SIZE(x) (((x) >> 22) & GENMASK(4, 0))
#define NFC_REG_CFG 0x04
#define NFC_REG_DADR 0x08
#define NFC_REG_IADR 0x0c
#define NFC_REG_BUF 0x10
#define NFC_REG_INFO 0x14
#define NFC_REG_DC 0x18
#define NFC_REG_ADR 0x1c
#define NFC_REG_DL 0x20
#define NFC_REG_DH 0x24
#define NFC_REG_CADR 0x28
#define NFC_REG_SADR 0x2c
#define NFC_REG_PINS 0x30
#define NFC_REG_VER 0x38
#define NFC_RB_IRQ_EN BIT(21)
#define CMDRWGEN(cmd_dir, ran, bch, short_mode, page_size, pages) \
( \
(cmd_dir) | \
((ran) << 19) | \
((bch) << 14) | \
((short_mode) << 13) | \
(((page_size) & 0x7f) << 6) | \
((pages) & 0x3f) \
)
#define GENCMDDADDRL(adl, addr) ((adl) | ((addr) & 0xffff))
#define GENCMDDADDRH(adh, addr) ((adh) | (((addr) >> 16) & 0xffff))
#define GENCMDIADDRL(ail, addr) ((ail) | ((addr) & 0xffff))
#define GENCMDIADDRH(aih, addr) ((aih) | (((addr) >> 16) & 0xffff))
#define DMA_DIR(dir) ((dir) ? NFC_CMD_N2M : NFC_CMD_M2N)
#define ECC_CHECK_RETURN_FF (-1)
#define NAND_CE0 (0xe << 10)
#define NAND_CE1 (0xd << 10)
#define DMA_BUSY_TIMEOUT 0x100000
#define CMD_FIFO_EMPTY_TIMEOUT 1000
#define MAX_CE_NUM 2
/* eMMC clock register, misc control */
#define CLK_SELECT_NAND BIT(31)
#define NFC_CLK_CYCLE 6
/* nand flash controller delay 3 ns */
#define NFC_DEFAULT_DELAY 3000
#define ROW_ADDER(page, index) (((page) >> (8 * (index))) & 0xff)
#define MAX_CYCLE_ADDRS