1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
|
/*
* DA9150 Core MFD Driver
*
* Copyright (c) 2014 Dialog Semiconductor
*
* Author: Adam Thomson <Adam.Thomson.Opensource@diasemi.com>
*
* This program is free software; you can redistribute it and/or modify it
* under the terms of the GNU General Public License as published by the
* Free Software Foundation; either version 2 of the License, or (at your
* option) any later version.
*/
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/i2c.h>
#include <linux/regmap.h>
#include <linux/slab.h>
#include <linux/irq.h>
#include <linux/interrupt.h>
#include <linux/mfd/core.h>
#include <linux/mfd/da9150/core.h>
#include <linux/mfd/da9150/registers.h>
static bool da9150_volatile_reg(struct device *dev, unsigned int reg)
{
switch (reg) {
case DA9150_PAGE_CON:
case DA9150_STATUS_A:
case DA9150_STATUS_B:
case DA9150_STATUS_C:
case DA9150_STATUS_D:
case DA9150_STATUS_E:
case DA9150_STATUS_F:
case DA9150_STATUS_G:
case DA9150_STATUS_H:
case DA9150_STATUS_I:
case DA9150_STATUS_J:
case DA9150_STATUS_K:
case DA9150_STATUS_L:
case DA9150_STATUS_N:
case DA9150_FAULT_LOG_A:
case DA9150_FAULT_LOG_B:
case DA9150_EVENT_E:
case DA9150_EVENT_F:
case DA9150_EVENT_G:
case DA9150_EVENT_H:
case DA9150_CONTROL_B:
case DA9150_CONTROL_C:
case DA9150_GPADC_MAN:
case DA9150_GPADC_RES_A:
case DA9150_GPADC_RES_B:
case DA9150_ADETVB_CFG_C:
case DA9150_ADETD_STAT:
case DA9150_ADET_CMPSTAT:
case DA9150_ADET_CTRL_A:
case DA9150_PPR_TCTR_B:
case DA9150_COREBTLD_STAT_A:
case DA9150_CORE_DATA_A:
case DA9150_CORE_DATA_B:
case DA9150_CORE_DATA_C:
case DA9150_CORE_DATA_D:
case DA9150_CORE2WIRE_STAT_A:
case DA9150_FW_CTRL_C:
case DA9150_FG_CTRL_B:
case DA9150_FW_CTRL_B:
case DA9150_GPADC_CMAN:
case DA9150_GPADC_CRES_A:
case DA9150_GPADC_CRES_B:
case DA9150_CC_ICHG_RES_A:
case DA9150_CC_ICHG_RES_B:
case DA9150_CC_IAVG_RES_A:
case DA9150_CC_IAVG_RES_B:
case DA9150_TAUX_CTRL_A:
case DA9150_TAUX_VALUE_H:
case DA9150_TAUX_VALUE_L:
case DA9150_TBAT_RES_A:
case DA9150_TBAT_RES_B:
return true;
default:
return false;
}
}
static const struct regmap_range_cfg da9150_range_cfg[] = {
{
.range_min = DA9150_PAGE_CON,
.range_max = DA9150_TBAT_RES_B,
.selector_reg = DA9150_PAGE_CON,
.selector_mask = DA9150_I2C_PAGE_MASK,
.selector_shift = DA9150_I2C_PAGE_SHIFT,
.window_start = 0,
.window_len = 256,
},
};
static const struct regmap_config da9150_regmap_config = {
.reg_bits = 8,
.val_bits = 8,
.ranges = da9150_range_cfg,
.num_ranges = ARRAY_SIZE(da9150_range_cfg),
.max_register = DA9150_TBAT_RES_B,
.cache_type = REGCACHE_RBTREE,
.volatile_reg = da9150_volatile_reg,
};
u8 da9150_reg_read(struct da9150 *da9150, u16 reg)
{
int val, ret;
ret = regmap_read(da9150->regmap, reg, &val);
if (ret)
dev_err(da9150->dev, "Failed to read from reg 0x%x: %d\n",
reg, ret);
return (u8) val;
}
EXPORT_SYMBOL_GPL(da9150_reg_read);
void da9150_reg_write(struct da9150 *da9150, u16 reg, u8 val)
{
int ret;
ret = regmap_write(da9150->regmap, reg, val);
if (ret)
dev_err(da9150->dev, "Failed to write to reg 0x%x: %d\n",
reg, ret);
}
EXPORT_SYMBOL_GPL(da9150_reg_write);
void da9150_set_bits(struct da9150 *da9150, u16 reg, u8 mask, u8 val)
{
int ret;
ret = regmap_update_bits(da9150->regmap, reg, mask, val);
if (ret)
dev_err(da9150->dev, "Failed to set bits in reg 0x%x: %d\n",
reg, ret);
}
EXPORT_SYMBOL_GPL(da9150_set_bits);
void da9150_bulk_read(struct da9150 *da9150, u16 reg, int count, u8 *buf)
{
int ret;
ret = regmap_bulk_read(da9150->regmap, reg, buf, count);
if (ret)
dev_err(da9150->dev, "Failed to bulk read from reg 0x%x: %d\n",
reg, ret);
}
EXPORT_SYMBOL_GPL(da9150_bulk_read);
void da9150_bulk_write(struct da9150 *da9150, u16 reg, int count, const u8 *buf)
{
int ret;
ret = regmap_raw_write(da9150->regmap, reg, buf, count);
if (ret)
dev_err(da9150->dev, "Failed to bulk write to reg 0x%x %d\n",
reg, ret);
}
EXPORT_SYMBOL_GPL(da9150_bulk_write);
static const struct regmap_irq da9150_irqs[] = {
[DA9150_IRQ_VBUS] = {
.reg_offset = 0,
.mask = DA9150_E_VBUS_MASK,
},
[DA9150_IRQ_CHG] = {
.reg_offset = 0,
.mask = DA9150_E_CHG_MASK,
},
[DA9150_IRQ_TCLASS] = {
.reg_offset = 0,
.mask = DA9150_E_TCLASS_MASK,
},
[DA9150_IRQ_TJUNC] = {
.reg_offset = 0,
.mask = DA9150_E_TJUNC_MASK,
},
[DA9150_IRQ_VFAULT] = {
.reg_offset = 0,
.mask = DA9150_E_VFAULT_MASK,
},
[DA9150_IRQ_CONF] = {
.reg_offset = 1,
.mask = DA9150_E_CONF_MASK,
},
[DA9150_IRQ_DAT] = {
.reg_offset = 1,
.mask = DA9150_E_DAT_MASK,
},
[DA9150_IRQ_DTYPE] = {
.reg_offset = 1,
.mask = DA9150_E_DTYPE_MASK,
},
[DA9150_IRQ_ID] = {
.reg_offset = 1,
.mask = DA9150_E_ID_MASK,
},
[DA9150_IRQ_ADP] = {
.reg_offset = 1,
.mask = DA9150_E_ADP_MASK,
},
[DA9150_IRQ_SESS_END] = {
.reg_offset = 1,
.mask = DA9150_E_SESS_END_MASK,
},
[DA9150_IRQ_SESS_VLD] = {
.reg_offset = 1,
.mask = DA9150_E_SESS_VLD_MASK,
},
[DA9150_IRQ_FG] = {
.reg_offset = 2,
.mask = DA9150_E_FG_MASK,
},
[DA9150_IRQ_GP] = {
.reg_offset = 2,
.mask = DA9150_E_GP_MASK,
},
[DA9150_IRQ_TBAT] = {
.reg_offset = 2,
.mask = DA9150_E_TBAT_MASK,
},
[DA9150_IRQ_GPIOA] = {
.reg_offset = 2,
.mask = DA9150_E_GPIOA_MASK,
},
[DA9150_IRQ_GPIOB] = {
.reg_offset = 2,
.mask = DA9150_E_GPIOB_MASK,
},
[DA9150_IRQ_GPIOC] = {
.reg_offset = 2,
.mask = DA9150_E_GPIOC_MASK,
},
[DA9150_IRQ_GPIOD] = {
.reg_offset = 2,
.mask = DA9150_E_GPIOD_MASK,
},
[DA9150_IRQ_GPADC] = {
.reg_offset = 2,
.mask = DA9150_E_GPADC_MASK,
},
[DA9150_IRQ_WKUP] = {
.reg_offset = 3,
.mask = DA9150_E_WKUP_MASK,
},
};
static const struct regmap_irq_chip da9150_regmap_irq_chip = {
.name = "da9150_irq",
.status_base = DA9150_EVENT_E,
.mask_base = DA9150_IRQ_MASK_E,
.ack_base = DA9150_EVENT_E,
.num_regs = DA9150_NUM_IRQ_REGS,
.irqs = da9150_irqs,
.num_irqs = ARRAY_SIZE(da9150_irqs),
};
static struct resource da9150_gpadc_resources[] = {
{
.name = "GPADC",
.start = DA9150_IRQ_GPADC,
.end = DA9150_IRQ_GPADC,
.flags = IORESOURCE_IRQ,
},
};
static struct resource da9150_charger_resources[] =
|